公开(公告)号：DE69825646T2

公开(公告)日：2005-08-18

申请号：DE69825646

申请日：1998-02-24

Applicant: ST MICROELECTRONICS SA

Inventor： BOURAS ILIAS ,  PAPADAS CONSTANTIN ,  MOREAU JEAN-PIERRE

IPC: G06F3/00 ,  H03K19/017 ,  H03K19/0175 ,  H03K19/0185

Abstract: The amplifier an input wire (E) which passes signals to two MOS transistors (N3,N4) in parallel. The centre point (10) of the transistors drives an output transistor (N2) driving an output line (S). The two parallel transistors set a low level directed by an input signal, and a high level commanded by the input signal respectively. The high level setting transistor has a drain junction with a very abrupt characteristic providing fast switching.

公开(公告)号：DE69825646D1

公开(公告)日：2004-09-23

申请号：DE69825646

申请日：1998-02-24

Applicant: ST MICROELECTRONICS SA

Inventor： BOURAS ILIAS ,  PAPADAS CONSTANTIN ,  MOREAU JEAN-PIERRE

IPC: G06F3/00 ,  H03K19/017 ,  H03K19/0175 ,  H03K19/0185

Abstract: The amplifier an input wire (E) which passes signals to two MOS transistors (N3,N4) in parallel. The centre point (10) of the transistors drives an output transistor (N2) driving an output line (S). The two parallel transistors set a low level directed by an input signal, and a high level commanded by the input signal respectively. The high level setting transistor has a drain junction with a very abrupt characteristic providing fast switching.