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    2.
    发明专利
    未知

    公开(公告)号：DE69611981D1

    公开(公告)日：2001-04-12

    申请号：DE69611981

    申请日：1996-12-17

    Applicant: ST MICROELECTRONICS SA

    Inventor： RENOUS CLAUDE

    IPC: H03F1/32 ,  H03H11/30 ,  H04M19/04

    Abstract: The device includes a chopper voltage regulator (12) and an amplifier (16) equipped with a saturation detector (26) which produces an active signal (Id) for application to a reference voltage source (30) via a low-pass filter (28). The line voltage (VL) is multiplied (20) by a coefficient (M) supplied by a microprocessor (14). The active signal is produced when the output voltage (Vcc) of the regulator is less than the product of the line voltage and the coefficient. The reference voltage (V0) in the absence of this signal corresponds to the lower limit of the regulator output.

    Differential amplifier with low level of noise, comprises two amplifiers equipped with output stages containing capacitors and a follower stage connected to the capacitors
    5.
    发明专利
    Differential amplifier with low level of noise, comprises two amplifiers equipped with output stages containing capacitors and a follower stage connected to the capacitors 未知

    公开(公告)号：FR2833430A1

    公开(公告)日：2003-06-13

    申请号：FR0116052

    申请日：2001-12-12

    Applicant: ST MICROELECTRONICS SA

    Inventor： RENOUS CLAUDE ,  LENZ KUNO

    IPC: H03F1/08 ,  H03F1/26

    Abstract: The structure of the differential amplifier circuit incorporating a stabilization circuit comprises two amplifiers (OA1,OA2) equipped with output stages containing the Miller capacitors (Cm) and compensating capacitors (Cmc), and a follower stage containing an amplifier (OA3) receiving the common-mode potential (VCM) and whose output is connected to the compensating capacitors (Cmc). The input of the follower stage is connected to the midpoint of a resistor bridge comprising four resistors, which is connected between the output (OUTP) of the first amlifiers (OA1) and the output (OUTN) of the second amplifier (OA2). The positive inputs of the amplifiers (OA1,OA2) are connected to the circuit inputs (INP,INN), respectively, by the intermediary of decoupling capacitors (C). The negative input of each of two amplifiers (OA1,OA2) is connected to a midpoint of two resistors. The resistor (R) fixes the input impedance of the amplifier circuit. The follower stage is implemented by use of a transistor of type MOS in series with a current source. In the second embodiment, the amplifier circuit is of a variable-gain amplifier which comprises two sets of compensating capacitors, some connectable by switches. In the third embodiment, the amplifier circuit comprises two amplifiers and two compensation circuits with capacitors, and has significantly lower supply current.

    6.
    发明专利
    未知

    公开(公告)号：FR2798014B1

    公开(公告)日：2002-03-29

    申请号：FR9911033

    申请日：1999-08-31

    Applicant: ST MICROELECTRONICS SA

    Inventor： RENOUS CLAUDE

    IPC: G05F1/59 ,  H02M1/10 ,  H02M3/155 ,  H02J1/10 ,  H02J7/34

    Abstract: The circuit receives several supply voltages (V1,V2,V3) via connections (L1,L2,L3) each of which is connected to respective switches (T1,T2,T3). At least one of the switches (T1) is a first MOS transistor of P conductivity type connected between the line (L1) and a common output terminal (S). The circuit also includes: - a second transistor (T3) of P conductivity type, connected between the grid of the first transistor (T1) and a node (N) maintained at the highest of the supply voltages; - a third transistor (T4), of N conductivity type, of less conductivity in the conducting state as the first transistor (T1), connected between the grid of the first transistor (T1) and a reference potential, and; - a fourth transistor (T5), of P type of conductivity, whose source is connected to a supply line associated with a switch, and whose drain is connected to a current source (R1) and to the grids of the second (T3), third (T4) and fourth (T5) transistors..

    7.
    发明专利
    未知

    公开(公告)号：DE69611981T2

    公开(公告)日：2001-10-04

    申请号：DE69611981

    申请日：1996-12-17

    Applicant: ST MICROELECTRONICS SA

    Inventor： RENOUS CLAUDE

    IPC: H03F1/32 ,  H03H11/30 ,  H04M19/04

    Abstract: The device includes a chopper voltage regulator (12) and an amplifier (16) equipped with a saturation detector (26) which produces an active signal (Id) for application to a reference voltage source (30) via a low-pass filter (28). The line voltage (VL) is multiplied (20) by a coefficient (M) supplied by a microprocessor (14). The active signal is produced when the output voltage (Vcc) of the regulator is less than the product of the line voltage and the coefficient. The reference voltage (V0) in the absence of this signal corresponds to the lower limit of the regulator output.

    8.
    发明专利
    未知

    公开(公告)号：FR2802315A1

    公开(公告)日：2001-06-15

    申请号：FR9915668

    申请日：1999-12-13

    Applicant: ST MICROELECTRONICS SA

    Inventor： RENOUS CLAUDE

    IPC: G05F1/565 ,  G05F1/573

    Abstract: The circuit has a regulator zone with a feedback circuit controlling a series ballast transistor (T1) by comparison of output voltage with a reference voltage (Vref). The circuit also has a current limiter zone, with a series transistor (T7) between ballast transistor and power output. A detector circuit causes the transistor (T7) to operate in blocking mode if output voltage falls too far.

    9.
    发明专利
    未知

    公开(公告)号：FR2896051B1

    公开(公告)日：2008-04-18

    申请号：FR0600143

    申请日：2006-01-09

    Applicant: ST MICROELECTRONICS SA

    Inventor： RENOUS CLAUDE

    IPC: G05F1/575

    Abstract: The regulator has a transconductance amplifier (310) including a MOS type differential amplifier pair, and a voltage follower (320) connected to the amplifier. A MOS transistor (330) is connected to an output stage of the voltage regulator. The amplifier has a resistive load (360) with a profile of K per gm, where gm corresponds to transconductance coefficient of a differential input pair of the amplifier, where the load is connected to a supply potential.

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