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公开(公告)号：DE69532315T2
公开(公告)日：2004-09-09
申请号：DE69532315
申请日：1995-09-25
Applicant: ST MICROELECTRONICS SA
Inventor： SIAUDEAU JEAN-LOUIS , PAVLIN ANTOINE
Abstract: Two external terminals (Vcc, G) are connected to the positive supply and ground. Control voltages (V1, V3) switch first and second vertical MOS transistors (S1, S3). A third control voltage (V4) switches a lateral MOS transistor (S4) whose source and drain are connected to ground and to the vertical bipolar transistor base (T). An alternative directly replaces the vertical MOS transistors with npn bipolar transistors. The integrated circuit forming these components has an n-type material substrate whose rear part is highly doped and covered by a metallisation. There are cells for each vertical MOS transistor, a region for the bipolar transistor and enclosed blocks in the substrate for the zener diode and lateral MOS transistor. Metallisations interconnect the components.
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公开(公告)号：DE69532315D1
公开(公告)日：2004-01-29
申请号：DE69532315
申请日：1995-09-25
Applicant: ST MICROELECTRONICS SA
Inventor： SIAUDEAU JEAN-LOUIS , PAVLIN ANTOINE
Abstract: Two external terminals (Vcc, G) are connected to the positive supply and ground. Control voltages (V1, V3) switch first and second vertical MOS transistors (S1, S3). A third control voltage (V4) switches a lateral MOS transistor (S4) whose source and drain are connected to ground and to the vertical bipolar transistor base (T). An alternative directly replaces the vertical MOS transistors with npn bipolar transistors. The integrated circuit forming these components has an n-type material substrate whose rear part is highly doped and covered by a metallisation. There are cells for each vertical MOS transistor, a region for the bipolar transistor and enclosed blocks in the substrate for the zener diode and lateral MOS transistor. Metallisations interconnect the components.
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