公开(公告)号：FR2812984B1

公开(公告)日：2002-10-11

申请号：FR0010554

申请日：2000-08-11

Applicant: ST MICROELECTRONICS SA

Inventor： TAILLET FRANCOIS

IPC: H03K3/3565 ,  H03K3/2893 ,  H03F3/343

公开(公告)号：DE69418976T2

公开(公告)日：1999-10-07

申请号：DE69418976

申请日：1994-11-08

Applicant: ST MICROELECTRONICS SA

Inventor： FOURNEL RICHARD ,  FRUHAUF SERGE ,  TAILLET FRANCOIS

IPC: B42D15/10 ,  G06K19/07 ,  G06K19/077 ,  H01L21/82 ,  H01L27/02

Abstract: The invention relates to fuses for an integrated circuit. Such fuses are useful for irreversibly preventing access to certain regions of the integrated circuit. They serve particularly in applications for memory cards. According to the invention, a fuse is provided consisting of an NP junction of shallow depth (12, 11) covered by a metal contact (22), the semiconducting region covered over not being heavily doped. In order to blow the fuse, the junction is forward-biased with a current which is sufficient to allow diffusion of metal as far as the junction, which short-circuits it. Detection is carried out also by forward-biasing the junction, but with a low current or a low voltage. Detection can also be carried out in reverse bias.

公开(公告)号：FR2897173A1

公开(公告)日：2007-08-10

申请号：FR0600974

申请日：2006-02-03

Applicant: ST MICROELECTRONICS SA

Inventor： TAILLET FRANCOIS

IPC: G06F11/30 ,  G05B19/045

Abstract: L'invention concerne un procédé de détection d'un dysfonctionnement dans une machine d'état (FSM) ayant un fonctionnement modélisé par un ensemble d'états reliés entre eux par des transitions, la machine d'état élaborant à chaque transition des signaux de sortie (PO, SO) en fonction de signaux d'entrée (PI, SI) comprenant des signaux (PI) élaborés lors d'une transition précédente. Selon l'invention, durant une transition, le procédé comprend des étapes consistant à élaborer au moins un signal de contrôle (CSO) en fonction d'un signal de contrôle (CSI) élaboré lors d'une transition précédente, déterminer une valeur attendue du signal de contrôle, et comparer le signal de contrôle avec la valeur attendue.

公开(公告)号：DE602007000870D1

公开(公告)日：2009-05-28

申请号：DE602007000870

申请日：2007-01-25

Applicant: ST MICROELECTRONICS SA

Inventor： TAILLET FRANCOIS ,  MURILLO LAURENT

IPC: G01R31/3183

公开(公告)号：DE69418976D1

公开(公告)日：1999-07-15

申请号：DE69418976

申请日：1994-11-08

Applicant: ST MICROELECTRONICS SA

Inventor： FOURNEL RICHARD ,  FRUHAUF SERGE ,  TAILLET FRANCOIS

IPC: B42D15/10 ,  G06K19/07 ,  G06K19/077 ,  H01L21/82 ,  H01L27/02

Abstract: The invention relates to fuses for an integrated circuit. Such fuses are useful for irreversibly preventing access to certain regions of the integrated circuit. They serve particularly in applications for memory cards. According to the invention, a fuse is provided consisting of an NP junction of shallow depth (12, 11) covered by a metal contact (22), the semiconducting region covered over not being heavily doped. In order to blow the fuse, the junction is forward-biased with a current which is sufficient to allow diffusion of metal as far as the junction, which short-circuits it. Detection is carried out also by forward-biasing the junction, but with a low current or a low voltage. Detection can also be carried out in reverse bias.

公开(公告)号：FR2812984A1

公开(公告)日：2002-02-15

申请号：FR0010554

申请日：2000-08-11

Applicant: ST MICROELECTRONICS SA

Inventor： TAILLET FRANCOIS

IPC: H03K3/3565 ,  H03K3/2893 ,  H03F3/343

Abstract: The amplifier comprises aa Schmitt trigger circuit (1) with an inverter stage (10) and a stage (11) for setting high (Vh) and low (Vh) hysteresis thresholds, a circuit (2) for detecting the level of logic supply voltage (Vcc) with respect to a detection threshold (Sd), and a circuit (3) constituted of two sub-circuits (30,31) for invalidating the hysteresis thresholds setting stage when the logic supply voltage is below the detection threshold. The detection circuit (2) comprises a branch for the current detection comprising two or more transistors (T20,T21) connected as diodes and a resistor (RX) connected in series between the logic supply voltage (Vcc) and the ground. The thresholds invalidation circuit (3) comprises transistors (T301,T302,T311,T312) for copying the current (I) of the detection branch, which contains a transfer gate (G1) connected between two transistors and controlled by a chip select signal (CSR). The detection circuit (2) comprises two additional transistors (T22,T23) controlled by the signal (CSR), and each connected in parallel with one of the transistors (T20,T21). The thresholds setting stage (11) comprises for each threshold, high and low, a corresponding node (N1,N2) in connection to the inverter stage (10). The thresholds invalidation circuit (3) comprises for each node (N1,N2) a first transistor (T310,T300) controlled by a second transistor (T311,T301) which is in current-mirror connection with a transistor (T21,T20) of the detection branch. The second transistor (T311,T301) is connected in series with a resistor (R310,R300), where the connection point (AN,AP) provides the first transistor control signal. The thresholds invalidation (3) circuit comprises for each node (N1,N2) another transistor (T312,T302) which is in current-mirror connection with a transistor (T20,T21) of the detection branch. The proportionality factor (k) of current-mirrors is a function of slope determining the variation of hysteresis with the level of logic supply voltage. An integrated circuit comprises at least one amplifier with threshold as proposed. An integrated circuit comprises the detection circuit (2) common to a number of amplifiers. An integrated circuit comprises at least one amplifier with threshold for filtering the logic supply voltage applied to the input of integrated circuit.