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公开(公告)号:FR2839829B1
公开(公告)日:2005-07-08
申请号:FR0205879
申请日:2002-05-14
Applicant: ST MICROELECTRONICS SA
Inventor: TARDIEU OLIVIER , MOREAUX CHRISTOPHE , KARI AHMED
IPC: H03K19/094 , H03K19/12
Abstract: A buffer of reduced size includes a logic gate to raise the potential level of input digital data having a first logic level to a potential equal to a low power supply potential, and to produce intermediate data if a validation signal is active. The buffer also includes a tristate inverter to produce output data, at an output, that are logically inverse to the intermediate data if the validation signal is active and having its output at high impedance if otherwise. Such a buffer is particularly useful as an output buffer for contact cards using a power supply potential different from a potential powering a reader with which the card communicates.
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公开(公告)号:FR2835328B1
公开(公告)日:2005-04-08
申请号:FR0201124
申请日:2002-01-31
Applicant: ST MICROELECTRONICS SA
Inventor: MOREAUX CHRISTOPHE , KARI AHMED , TARDIEU OLIVIER
IPC: G06K19/07 , G05F5/00 , G06K19/073
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公开(公告)号:FR2833781B1
公开(公告)日:2004-03-12
申请号:FR0116066
申请日:2001-12-13
Applicant: ST MICROELECTRONICS SA
Inventor: MOREAUX CHRISTOPHE , KARI AHMED , TARDIEU OLIVIER
Abstract: A contactless integrated circuit receiving an RF signal comprises a clock-signal generator to produce a clock signal from a first half wave and a second half wave representing the received RF signal. Also disclosed is a method for the generation of a clock signal in which the first half wave and the second half wave are compared to produce the clock signal. The invention is adapated for use in contactless cards, transponders, and the like.
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公开(公告)号:FR2835328A1
公开(公告)日:2003-08-01
申请号:FR0201124
申请日:2002-01-31
Applicant: ST MICROELECTRONICS SA
Inventor: MOREAUX CHRISTOPHE , KARI AHMED , TARDIEU OLIVIER
IPC: G06K19/07 , G05F5/00 , G06K19/073
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公开(公告)号:FR2833781A1
公开(公告)日:2003-06-20
申请号:FR0116066
申请日:2001-12-13
Applicant: ST MICROELECTRONICS SA
Inventor: MOREAUX CHRISTOPHE , KARI AHMED , TARDIEU OLIVIER
Abstract: The invention relates to a contactless integrated circuit which receives a radio frequency signal. According to the invention, the circuit comprises a clock generator, said generator being used to produce a clock signal (CLK) from a first alternation (AC0) and a second alternation (AC1) which are representative of the radio frequency signal received. The invention also relates to a method of generating a clock signal, during which the first and the second alternations are compared in order to produce the clock signal. The invention is suitable for contactless cards, transponders, etc.
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公开(公告)号:FR2839829A1
公开(公告)日:2003-11-21
申请号:FR0205879
申请日:2002-05-14
Applicant: ST MICROELECTRONICS SA
Inventor: TARDIEU OLIVIER , MOREAUX CHRISTOPHE , KARI AHMED
IPC: H03K19/094 , H03K19/12
Abstract: A buffer of reduced size includes a logic gate to raise the potential level of input digital data having a first logic level to a potential equal to a low power supply potential, and to produce intermediate data if a validation signal is active. The buffer also includes a tristate inverter to produce output data, at an output, that are logically inverse to the intermediate data if the validation signal is active and having its output at high impedance if otherwise. Such a buffer is particularly useful as an output buffer for contact cards using a power supply potential different from a potential powering a reader with which the card communicates.
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