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公开(公告)号:FR2793970A1
公开(公告)日:2000-11-24
申请号:FR9906424
申请日:1999-05-20
Applicant: ST MICROELECTRONICS SA
Inventor: JOUFFRE PIERRE OLIVIER , TELLIEZ ISABELLE , PAILLARDET FREDERIC
Abstract: The method involves using an insulated gate field effect transistor (IGFET) for charging of a capacitance. The transistor receives an analogue input at its source. The gate is connected to a clock signal to control the conductance of the transistor, and hence the charging of the capacitor. The switch comprises at least one field-effect insulated-gate transistor (SW) with the source (S) connected to receive an input analogue signal (Vin), and controlled by the gate (G) according to a clock signal (CKS) to have successively ''on'' and ''off'' states. At the start of each half-period (PB) of the clock signal (CKS) the transistor is off, and at the start of the next half-period (PC) and during a predetermined interval the capacitor (CP) is precharged with a predetermined voltage (V), then during the remaining interval (DR) of the half-period the capacitor (CP) is effectively connected between the source (S) and the gate (G) of the transistor (SW) which is on by action of the gate-source voltage which is quasi-independent of the level of input signal (Vin), and at the end of the half-period (PC) the gate (G) of the transistor (SW) and the capacitor (CP) are effectively connected to the ground. Independent claims are included for a capacitive switching device.
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公开(公告)号:FR2809266B1
公开(公告)日:2002-10-11
申请号:FR0006468
申请日:2000-05-19
Applicant: ST MICROELECTRONICS SA
Inventor: DEDIEU SEBASTIEN , PAILLARDET FREDERIC , TELLIEZ ISABELLE
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公开(公告)号:FR2914515B1
公开(公告)日:2009-07-03
申请号:FR0754198
申请日:2007-04-02
Applicant: ST MICROELECTRONICS SA
Inventor: BUSSON PIERRE , TELLIEZ ISABELLE , PAILLARDET FREDERIC
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公开(公告)号:FR2914515A1
公开(公告)日:2008-10-03
申请号:FR0754198
申请日:2007-04-02
Applicant: ST MICROELECTRONICS SA
Inventor: BUSSON PIERRE , TELLIEZ ISABELLE , PAILLARDET FREDERIC
Abstract: Module (1) d'émission radiofréquence adapté pour, dans une phase opérationnelle, générer un premier signal à émettre et transposer le signal sur une porteuse radiofréquence (FLO) en vue de son émission radio, et adapté pour, dans une phase de calibration, générer un second signal et transposer le second signal sur la porteuse radiofréquence (FLO)caractérisé en ce qu'il comporte un bloc (14) de calibration comportant un sous-échantillonneur adapté pour sous-échantillonner le second signal transposé (10) et un bloc (12) de calcul adapté pour calculer des coefficients de Transformée de Fourier représentatif du signal délivré par le sous-échantillonneur (10), en vue d'un traitement du premier signal à émettre, dans la phase opérationnelle, en fonction d'au moins certains desdits coefficients de Fourier calculés dans la phase de calibration.
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公开(公告)号:FR2809266A1
公开(公告)日:2001-11-23
申请号:FR0006468
申请日:2000-05-19
Applicant: ST MICROELECTRONICS SA
Inventor: DEDIEU SEBASTIEN , PAILLARDET FREDERIC , TELLIEZ ISABELLE
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公开(公告)号:DE60112995D1
公开(公告)日:2005-10-06
申请号:DE60112995
申请日:2001-05-16
Applicant: ST MICROELECTRONICS SA
Inventor: DEDIEU SEBASTIEN , PAILLARDET FREDERIC , TELLIEZ ISABELLE
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公开(公告)号:FR2793970B1
公开(公告)日:2001-08-31
申请号:FR9906424
申请日:1999-05-20
Applicant: ST MICROELECTRONICS SA
Inventor: JOUFFRE PIERRE OLIVIER , TELLIEZ ISABELLE , PAILLARDET FREDERIC
Abstract: With a switch including at least one insulated-gate field-effect transistor, an analog input signal is delivered on the source of the transistor and the transistor is controlled on its gate synchronized with a clock signal to successively turn it on and off. On the conclusion of each half-period of the clock signal during which the transistor is off, a precharging capacitor is precharged at the start of the next half-period and for a predetermined precharge duration, with a predetermined precharge voltage. Then, for the remaining duration of the half-period, the precharged capacitor is connected between the source and the gate of the transistor to turn it on under the action of a gate-source voltage which is almost independent of the level of the input signal. At the end of the half-period, the gate of the transistor and the precharging capacitor are grounded.
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