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    2.
    发明专利
    未知

    公开(公告)号：FR2836281B1

    公开(公告)日：2004-07-09

    申请号：FR0202171

    申请日：2002-02-20

    Applicant: ST MICROELECTRONICS SA

    Inventor： DIOT JEAN LUC ,  PRIOR CHRISTOPHE ,  TEYSSEYRE JEROME ,  MOSCICKI JEAN PIERRE

    IPC: H01L21/56 ,  H01L23/31 ,  H01L23/495

    Abstract: The flat grid is made of electrically conducting material and presents the front and the rear faces through which the main perforation (3) is made so to form the radially elongated legs (7) in a zone between a central platform (4) and a peripheral part (5). Certain legs (6) have the exterior and the interior extremities linking the peripheral part and the platform at 45 deg. angles, and other legs (7) have the exterior extremities linked to the peripheral part and the interior extremities at a distance from the platform. The grid (1) is designed so that it can be placed between two parts of a mould for injecting an encapsulation material demarcating at least one cavity where an integrated circuit chip is placed, and the rear face of the grid is in contact with the support surface of the mould. The platform (4) has at least one hollow-out on its rear face in the form of two grooves (9,10), and other grooves (12) link the hollow-out to the perforations (3). The platform (4) also has on its rear face the cavities (11) opening up in the perforation (3), and the linking grooves (12) are opening up into the cavities. The peripheral part (5) has at least one gas-escape perforation (16) extended at a distance from the main perforation (3), and a groove links the cavity to the perforation. The peripheral part (5) has also an elongated injection opening (13) skirting a peripheral part of the perforation, and a cavity in the form of a slit links the injection opening to the perforation. The body of semiconductor case is claimed and comprises the grid with central platform and elongated legs for electrical connections distributed around the platform, the means for encapsulating the integrated circuit chip fastened on the front face of the platform, and the means for electrical connections linking the chip and the legs. The encapsulation material extends from the rear face of the grid between the legs, and between the legs and the platform, and it forms on the front face of the grid a projecting ring traversed by the legs and to a distance of the interior and the exterior extremities.

    4.
    发明专利
    未知

    公开(公告)号：FR2854495B1

    公开(公告)日：2005-12-02

    申请号：FR0305263

    申请日：2003-04-29

    Applicant: ST MICROELECTRONICS SA

    Inventor： DIOT JEAN LUC ,  TEYSSEYRE JEROME

    IPC: H01L21/56 ,  H01L23/498 ,  H01L21/48 ,  H01L31/0203

    Abstract: The method involves placing a grid (1) in a cavity of an injection mold. The cavity has two opposed walls supported on opposed faces of the grid. A filling material (17) is injected to fill spaces separating spaced parts of the grid to obtain a plate (18). An integrated circuit chip (19) is fixed on the grid and electrically connected to electric connection legs. An independent claim is also included for a semiconductor case comprising a grid.

    Flat conducting grid for semiconductor case, comprises a perforated zone made so to form the radially elongated legs between a central platform and a peripheral part
    7.
    发明专利
    Flat conducting grid for semiconductor case, comprises a perforated zone made so to form the radially elongated legs between a central platform and a peripheral part 未知

    公开(公告)号：FR2836281A1

    公开(公告)日：2003-08-22

    申请号：FR0202171

    申请日：2002-02-20

    Applicant: ST MICROELECTRONICS SA

    Inventor： DIOT JEAN LUC ,  PRIOR CHRISTOPHE ,  TEYSSEYRE JEROME ,  MOSCICKI JEAN PIERRE

    IPC: H01L21/56 ,  H01L23/31 ,  H01L23/495

    Abstract: The flat grid is made of electrically conducting material and presents the front and the rear faces through which the main perforation (3) is made so to form the radially elongated legs (7) in a zone between a central platform (4) and a peripheral part (5). Certain legs (6) have the exterior and the interior extremities linking the peripheral part and the platform at 45 deg. angles, and other legs (7) have the exterior extremities linked to the peripheral part and the interior extremities at a distance from the platform. The grid (1) is designed so that it can be placed between two parts of a mould for injecting an encapsulation material demarcating at least one cavity where an integrated circuit chip is placed, and the rear face of the grid is in contact with the support surface of the mould. The platform (4) has at least one hollow-out on its rear face in the form of two grooves (9,10), and other grooves (12) link the hollow-out to the perforations (3). The platform (4) also has on its rear face the cavities (11) opening up in the perforation (3), and the linking grooves (12) are opening up into the cavities. The peripheral part (5) has at least one gas-escape perforation (16) extended at a distance from the main perforation (3), and a groove links the cavity to the perforation. The peripheral part (5) has also an elongated injection opening (13) skirting a peripheral part of the perforation, and a cavity in the form of a slit links the injection opening to the perforation. The body of semiconductor case is claimed and comprises the grid with central platform and elongated legs for electrical connections distributed around the platform, the means for encapsulating the integrated circuit chip fastened on the front face of the platform, and the means for electrical connections linking the chip and the legs. The encapsulation material extends from the rear face of the grid between the legs, and between the legs and the platform, and it forms on the front face of the grid a projecting ring traversed by the legs and to a distance of the interior and the exterior extremities.

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