公开(公告)号：FR2825515B1

公开(公告)日：2003-12-12

申请号：FR0107185

申请日：2001-05-31

Applicant: ST MICROELECTRONICS SA

Inventor： DIOT JEAN LUC

IPC: H01L23/31 ,  H01L23/495 ,  H01L23/48 ,  H01L23/043

Abstract: The semiconductor casing comprises a flat, electrically conducting grid forming a central platform to support the semiconductor chip. Electrical connection terminals are distributed around the platform. Each has a reduced thickness section between thicker end portions, facilitating its anchorage within the insulating material used to encapsulate the chip and connection wires. The semiconductor casing comprises a flat grid made of electrically conducting material, with a front and rear surfaces, forming a central platform and extended electrical connection terminals distributed around the platform. The connection terminals (4) of the grid (2) each comprise an inner section (5) and an outer section (6), the back surfaces of these sections forming part of the back surface of the complete casing. The inner and outer sections are joined by a reduced thickness section (7), with the reduction causing an indent (8) on the rear surface. Electrical connection wires (12) link the front surface (5a) of the inner sections to the terminals of the circuit chip (11) mounted centrally on the platform of the grid.

公开(公告)号：FR2891372A1

公开(公告)日：2007-03-30

申请号：FR0552841

申请日：2005-09-23

Applicant: ST MICROELECTRONICS SA

Inventor： SAUGIER ERIC ,  DIOT JEAN LUC ,  MEE FABRICE

IPC: G02B7/09

Abstract: L'invention concerne un barillet de lentille à focale variable à commande électrique, en boîtier de type pile bouton, comprenant un tube cylindrique creux isolant (30) de diamètre intérieur sensiblement égal à celui du boîtier de lentille, au moins deux bossages (32) s'étendant radialement vers l'intérieur du tube et formant des surfaces d'appui (33) pour la périphérie de la lentille dans un même plan radial, des premières métallisations (35) s'étendant sur au moins une desdites surfaces d'appui et depuis celles-ci dans des premiers canaux (38) formés dans la paroi interne du tube vers au moins une extrémité du tube, et des deuxièmes métallisations (41) dont chacune forme une zone de contact selon une portion de couronne de la surface interne du tube pour venir en appui sur la surface latérale de la lentille et s'étend vers ladite au moins une extrémité du cylindre.

公开(公告)号：FR2836281B1

公开(公告)日：2004-07-09

申请号：FR0202171

申请日：2002-02-20

Applicant: ST MICROELECTRONICS SA

Inventor： DIOT JEAN LUC ,  PRIOR CHRISTOPHE ,  TEYSSEYRE JEROME ,  MOSCICKI JEAN PIERRE

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/495

Abstract: The flat grid is made of electrically conducting material and presents the front and the rear faces through which the main perforation (3) is made so to form the radially elongated legs (7) in a zone between a central platform (4) and a peripheral part (5). Certain legs (6) have the exterior and the interior extremities linking the peripheral part and the platform at 45 deg. angles, and other legs (7) have the exterior extremities linked to the peripheral part and the interior extremities at a distance from the platform. The grid (1) is designed so that it can be placed between two parts of a mould for injecting an encapsulation material demarcating at least one cavity where an integrated circuit chip is placed, and the rear face of the grid is in contact with the support surface of the mould. The platform (4) has at least one hollow-out on its rear face in the form of two grooves (9,10), and other grooves (12) link the hollow-out to the perforations (3). The platform (4) also has on its rear face the cavities (11) opening up in the perforation (3), and the linking grooves (12) are opening up into the cavities. The peripheral part (5) has at least one gas-escape perforation (16) extended at a distance from the main perforation (3), and a groove links the cavity to the perforation. The peripheral part (5) has also an elongated injection opening (13) skirting a peripheral part of the perforation, and a cavity in the form of a slit links the injection opening to the perforation. The body of semiconductor case is claimed and comprises the grid with central platform and elongated legs for electrical connections distributed around the platform, the means for encapsulating the integrated circuit chip fastened on the front face of the platform, and the means for electrical connections linking the chip and the legs. The encapsulation material extends from the rear face of the grid between the legs, and between the legs and the platform, and it forms on the front face of the grid a projecting ring traversed by the legs and to a distance of the interior and the exterior extremities.

公开(公告)号：FR2825515A1

公开(公告)日：2002-12-06

申请号：FR0107185

申请日：2001-05-31

Applicant: ST MICROELECTRONICS SA

Inventor： DIOT JEAN LUC

IPC: H01L23/31 ,  H01L23/495 ,  H01L23/48 ,  H01L23/043

Abstract: The semiconductor casing comprises a flat, electrically conducting grid forming a central platform to support the semiconductor chip. Electrical connection terminals are distributed around the platform. Each has a reduced thickness section between thicker end portions, facilitating its anchorage within the insulating material used to encapsulate the chip and connection wires. The semiconductor casing comprises a flat grid made of electrically conducting material, with a front and rear surfaces, forming a central platform and extended electrical connection terminals distributed around the platform. The connection terminals (4) of the grid (2) each comprise an inner section (5) and an outer section (6), the back surfaces of these sections forming part of the back surface of the complete casing. The inner and outer sections are joined by a reduced thickness section (7), with the reduction causing an indent (8) on the rear surface. Electrical connection wires (12) link the front surface (5a) of the inner sections to the terminals of the circuit chip (11) mounted centrally on the platform of the grid.

公开(公告)号：FR2899384A1

公开(公告)日：2007-10-05

申请号：FR0602730

申请日：2006-03-29

Applicant: ST MICROELECTRONICS SA ,  ST MICROELECTRONICS R&D LTD

Inventor： BRECHIGNAC REMI ,  DIOT JEAN LUC ,  CHANNON KEVIN ,  CHRISTISON ERIC

IPC: H01L31/0203 ,  H05K3/34

Abstract: Boîtier semi-conducteur destiné à être monté sur une plaque par l'intermédiaire de soudures, comprenant, disposés selon un axe, un composant semi-conducteur (2) présentant sur une face arrière des plots en saillie de connexion électrique (5) destinés à être soudés sur ladite plaque et une cage extérieure (16) entourant ledit composant et présentant un bord arrière destiné à être soudé sur ladite plaque et une partie avant traversée par une partie avant dudit composant ; ledit composant et ladite cage étant adaptés pour coulisser axialement l'un par rapport à l'autre de façon à être amenés dans leur position de soudage par rapport à ladite plaque et présentant des parties complémentaires de maintien (15, 19) venant en contact et destinées à les maintenir l'un par rapport à l'autre lorsqu'ils sont axialement éloignés de ladite position de soudage et à les libérer l'un par rapport à l'autre lorsqu'ils sont à ladite position de soudage.

公开(公告)号：FR2854495B1

公开(公告)日：2005-12-02

申请号：FR0305263

申请日：2003-04-29

Applicant: ST MICROELECTRONICS SA

Inventor： DIOT JEAN LUC ,  TEYSSEYRE JEROME

IPC: H01L21/56 ,  H01L23/498 ,  H01L21/48 ,  H01L31/0203

Abstract: The method involves placing a grid (1) in a cavity of an injection mold. The cavity has two opposed walls supported on opposed faces of the grid. A filling material (17) is injected to fill spaces separating spaced parts of the grid to obtain a plate (18). An integrated circuit chip (19) is fixed on the grid and electrically connected to electric connection legs. An independent claim is also included for a semiconductor case comprising a grid.

公开(公告)号：FR2854495A1

公开(公告)日：2004-11-05

申请号：FR0305263

申请日：2003-04-29

Applicant: ST MICROELECTRONICS SA

Inventor： DIOT JEAN LUC ,  TEYSSEYRE JEROME

IPC: H01L21/56 ,  H01L23/498 ,  H01L21/48 ,  H01L31/0203

Abstract: The method involves placing a grid (1) in a cavity of an injection mold. The cavity has two opposed walls supported on opposed faces of the grid. A filling material (17) is injected to fill spaces separating spaced parts of the grid to obtain a plate (18). An integrated circuit chip (19) is fixed on the grid and electrically connected to electric connection legs. An independent claim is also included for a semiconductor case comprising a grid.

公开(公告)号：FR2836281A1

公开(公告)日：2003-08-22

申请号：FR0202171

申请日：2002-02-20

Applicant: ST MICROELECTRONICS SA

Inventor： DIOT JEAN LUC ,  PRIOR CHRISTOPHE ,  TEYSSEYRE JEROME ,  MOSCICKI JEAN PIERRE

IPC: H01L21/56 ,  H01L23/31 ,  H01L23/495

Abstract: The flat grid is made of electrically conducting material and presents the front and the rear faces through which the main perforation (3) is made so to form the radially elongated legs (7) in a zone between a central platform (4) and a peripheral part (5). Certain legs (6) have the exterior and the interior extremities linking the peripheral part and the platform at 45 deg. angles, and other legs (7) have the exterior extremities linked to the peripheral part and the interior extremities at a distance from the platform. The grid (1) is designed so that it can be placed between two parts of a mould for injecting an encapsulation material demarcating at least one cavity where an integrated circuit chip is placed, and the rear face of the grid is in contact with the support surface of the mould. The platform (4) has at least one hollow-out on its rear face in the form of two grooves (9,10), and other grooves (12) link the hollow-out to the perforations (3). The platform (4) also has on its rear face the cavities (11) opening up in the perforation (3), and the linking grooves (12) are opening up into the cavities. The peripheral part (5) has at least one gas-escape perforation (16) extended at a distance from the main perforation (3), and a groove links the cavity to the perforation. The peripheral part (5) has also an elongated injection opening (13) skirting a peripheral part of the perforation, and a cavity in the form of a slit links the injection opening to the perforation. The body of semiconductor case is claimed and comprises the grid with central platform and elongated legs for electrical connections distributed around the platform, the means for encapsulating the integrated circuit chip fastened on the front face of the platform, and the means for electrical connections linking the chip and the legs. The encapsulation material extends from the rear face of the grid between the legs, and between the legs and the platform, and it forms on the front face of the grid a projecting ring traversed by the legs and to a distance of the interior and the exterior extremities.