3.
    发明专利
    未知

    公开(公告)号:DE602004015029D1

    公开(公告)日:2008-08-28

    申请号:DE602004015029

    申请日:2004-08-27

    Abstract: The state of an output bit is conditioned to respective states of the bits of the initial flow examined by multibit words of identical lengths. The state of the current output bit is conditioned to the state of previous output bit, upon occurrence of word of bits of identical states. An independent claim is also included for bitflow normalization circuit.

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