公开(公告)号：DE60029599T2

公开(公告)日：2007-07-19

申请号：DE60029599

申请日：2000-09-12

Applicant: ST MICROELECTRONICS SA ,  COMMISSARIAT ENERGIE ATOMIQUE

Inventor： MORAND YVES ,  GOBIL YVELINE ,  DEMOLLIENS OLIVIER ,  ASSOUS MYRIAM

IPC: H01L21/768 ,  H01L21/3205 ,  H01L23/522 ,  H01L23/532

Abstract: The invention relates to a process for making a copper connection with a copper connection element in an integrated circuit comprising a damascene structure, with the connection element being covered successively with an encapsulation layer and at least one layer of dielectric material with a very low dielectric constant. The process includes the steps of etching the layer of dielectric material until the encapsulation layer is reached in order to obtain a connection hole opposite the connection element. A protective layer is then formed on the walls of the connection hole, with the protective layer preventing contamination of the dielectric layer from diffusion of copper. The protective and encapsulation layers are then etched at the bottom of the connection hole in such a way as to reveal the connection element. The connection hole is then filled with copper.

公开(公告)号：DE60029599D1

公开(公告)日：2006-09-07

申请号：DE60029599

申请日：2000-09-12

Applicant: ST MICROELECTRONICS SA ,  COMMISSARIAT ENERGIE ATOMIQUE

Inventor： MORAND YVES ,  GOBIL YVELINE ,  DEMOLLIENS OLIVIER ,  ASSOUS MYRIAM

IPC: H01L21/768 ,  H01L21/3205 ,  H01L23/522 ,  H01L23/532

Abstract: The invention relates to a process for making a copper connection with a copper connection element in an integrated circuit comprising a damascene structure, with the connection element being covered successively with an encapsulation layer and at least one layer of dielectric material with a very low dielectric constant. The process includes the steps of etching the layer of dielectric material until the encapsulation layer is reached in order to obtain a connection hole opposite the connection element. A protective layer is then formed on the walls of the connection hole, with the protective layer preventing contamination of the dielectric layer from diffusion of copper. The protective and encapsulation layers are then etched at the bottom of the connection hole in such a way as to reveal the connection element. The connection hole is then filled with copper.

公开(公告)号：FR2798512A1

公开(公告)日：2001-03-16

申请号：FR9911468

申请日：1999-09-14

Applicant: COMMISSARIAT ENERGIE ATOMIQUE

Inventor： MORAND YVES ,  GOBIL YVELINE ,  DEMOLLIENS OLIVIER ,  ASSOUS MYRIAM

IPC: H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528

Abstract: The invention concerns a method for producing a copper connection with a copper connecting element (2) of an integrated circuit comprising a damascene structure, the connecting element (2) being coated successively with an encapsulating layer (3) and at least a dielectric material layer (4) with low dielectric constant. The method comprises the following steps: etching said dielectric material layer (4) until the encapsulating layer (3) is reached, to obtain a connection hole, opposite the connecting element; producing a protective layer (7) on the wall of the connecting hole, the protective layer preventing the dielectric layer from being contaminated by copper diffusion; etching the encapsulating layer (3), at the base of the connecting hole, in such a way as to expose the connecting element (2); filling the connecting hole with copper.

公开(公告)号：FR2791472B1

公开(公告)日：2002-07-05

申请号：FR9903819

申请日：1999-03-26

Applicant: COMMISSARIAT ENERGIE ATOMIQUE

Inventor： TROUILLER YORICK ,  DEMOLLIENS OLIVIER

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/768

公开(公告)号：FR2803438B1

公开(公告)日：2002-02-08

申请号：FR9916637

申请日：1999-12-29

Applicant: COMMISSARIAT ENERGIE ATOMIQUE

Inventor： DEMOLLIENS OLIVIER ,  BERRUYER PASCALE ,  TROUILLET YORICK ,  MORAND YVES

IPC: H01L21/768 ,  H01L23/52 ,  H01L23/48 ,  H01L21/30

Abstract: The invention concerns a method for fabricating a damascene type structure of interconnections on a semiconductor device. It includes the following steps:formation of a first level of conductors in a first electric insulating layer and of a second level of conductors in a second electric insulating layer, with the conductors in the first level being arranged with a pre-determined spacing in order to allow, in a later step, the formation of air or vacuum gaps between the conductors in the first level,elimination of the second electric insulating layer,elimination, at least partial, of the first electric insulating layer in order to eliminate at least some parts of the first layer corresponding to the gaps to be formed,deposit, over the structure thus obtained, of a material with low permittivity, with this deposit not filling the space between the conductors in the first level whose spacing has been planned to allow the formation of gaps.

公开(公告)号：FR2798512B1

公开(公告)日：2001-10-19

申请号：FR9911468

申请日：1999-09-14

Applicant: COMMISSARIAT ENERGIE ATOMIQUE

Inventor： MORAND YVES ,  GOBIL YVELINE ,  DEMOLLIENS OLIVIER ,  ASSOUS MYRIAM

IPC: H01L21/3205 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528

Abstract: The invention relates to a process for making a copper connection with a copper connection element in an integrated circuit comprising a damascene structure, with the connection element being covered successively with an encapsulation layer and at least one layer of dielectric material with a very low dielectric constant. The process includes the steps of etching the layer of dielectric material until the encapsulation layer is reached in order to obtain a connection hole opposite the connection element. A protective layer is then formed on the walls of the connection hole, with the protective layer preventing contamination of the dielectric layer from diffusion of copper. The protective and encapsulation layers are then etched at the bottom of the connection hole in such a way as to reveal the connection element. The connection hole is then filled with copper.

公开(公告)号：FR2803438A1

公开(公告)日：2001-07-06

申请号：FR9916637

申请日：1999-12-29

Applicant: COMMISSARIAT ENERGIE ATOMIQUE

Inventor： DEMOLLIENS OLIVIER ,  BERRUYER PASCALE ,  TROUILLET YORICK ,  MORAND YVES

IPC: H01L21/768 ,  H01L23/52 ,  H01L23/48 ,  H01L21/30

Abstract: The invention concerns a method for making a Damascene type interconnection structure on a semiconductor device, comprising the following steps: forming a first level of conductors in a first layer on electrical insulation and a second level of conductors in a second layer of electrical insulation, the first level conductors being spaced apart to enable, in a subsequent step, the formation of cavities between the first level conductors; eliminating the second electrical insulation level; eliminating at least partially the first electrical insulation layer to eliminate the parts of the first layer corresponding to the cavities to be formed; depositing on the resulting structure a material with low permittivity, said deposit not filling up the space between the first level conductors which have been arranged spaced apart to enable the formation of cavities.

公开(公告)号：FR2791472A1

公开(公告)日：2000-09-29

申请号：FR9903819

申请日：1999-03-26

Applicant: COMMISSARIAT ENERGIE ATOMIQUE

Inventor： TROUILLER YORICK ,  DEMOLLIENS OLIVIER

IPC: H01L21/033 ,  H01L21/311 ,  H01L21/768

Abstract: A stage of an integrated circuit (2) comprising connection lines (3) and underlying contact points (4) is produced by disposing masks (8, 9) that are piled on a substrate (1) and respectively hollowed at locations of the contact points and connection lines; successive etchings enable the desired imprints to be made, whereby the conducting material is subsequently deposited therein. Said method dispenses with the removal of resin layers (12) when a large surface area of the substrate (2) is bared, which would otherwise result in a deterioration of low-permittivity material used.