SENSOR SEMICONDUCTOR PACKAGE, PROVIDED WITH AN INSERT, AND METHOD FOR MAKING SAME
    1.
    发明申请
    SENSOR SEMICONDUCTOR PACKAGE, PROVIDED WITH AN INSERT, AND METHOD FOR MAKING SAME 审中-公开
    传感器半导体封装,提供插件及其制造方法

    公开(公告)号:WO02056388A3

    公开(公告)日:2003-01-03

    申请号:PCT/FR0200069

    申请日:2002-01-10

    Inventor: PRIOR CHRISTOPHE

    Abstract: The invention concerns a semiconductor package and its production method, wherein a semiconductor component (5) is fixed on a front surface of mounting and electrical connection means (2) and comprising a sensor (8), an insert (11) being supported on the front surface of said optical component, around said sensor and comprising an open passage (14) extending in front of said sensor, and encapsulating means (26) comprising a coating material which encloses said semiconductor component and the mounting and electrical connecting means, said passage comprising a cap (17).

    Abstract translation: 本发明涉及一种半导体封装及其制造方法,其中半导体部件(5)固定在安装和电气连接装置(2)的前表面上并且包括传感器(8),插入件(11)被支撑在 所述光学部件的前表面围绕所述传感器并且包括在所述传感器的前面延伸的开放通道(14),以及封装装置(26),其包括封装所述半导体部件和所述安装和电连接装置的所述通道 包括盖(17)。

    METHOD FOR PRODUCING AN OPTICAL SEMICONDUCTOR BOX AND OPTICAL SEMICONDUCTOR BOX
    2.
    发明申请
    METHOD FOR PRODUCING AN OPTICAL SEMICONDUCTOR BOX AND OPTICAL SEMICONDUCTOR BOX 审中-公开
    制造光学半导体盒和光学半导体盒的方法

    公开(公告)号:WO02058107A3

    公开(公告)日:2002-12-12

    申请号:PCT/FR0200212

    申请日:2002-01-18

    Inventor: PRIOR CHRISTOPHE

    Abstract: The invention relates to a method for producing an optical semiconductor box and said optical semiconductor box, housing an integrated circuit chip, the front surface of which is provided with an optical sensor and electrical connection areas distributed around said sensor, in which a transparent pad (6) extends out in front of the front face of the chip without covering the electrical connection areas of said chip. Wafers (2, 7) define a cavity (10) between them, in which the chip and the transparent pad are stacked and said wafers are provided with annular assembly surfaces (2a, 7a). Electrical contact pads (15) are positioned between said electrical connection areas and one surface (12) of said cavity. Electrical contact strips (14) are supported on a wafer (7) and extend out over said surface (12) of the cavity to make contact with said contact pads. A layer of adhesive (18) extends between said assembly surfaces (2a, 7a). Said strips (14) extend to pass between the assembly surfaces of said wafers in order to make external connections and the wafer which is located beside said transparent pad is provided with an opening located opposite the optical sensor.

    Abstract translation: 本发明涉及一种用于制造光学半导体盒的方法和所述光学半导体盒,所述光学半导体盒容纳集成电路芯片,所述集成电路芯片的前表面设置有光学传感器和分布在所述传感器周围的电连接区域,其中透明垫( 6)在芯片的正面的前方延伸出来而不覆盖所述芯片的电连接区域。 晶片(2,7)在它们之间限定一个空腔(10),其中芯片和透明垫堆叠在其中,并且所述晶片设有环形组装表面(2a,7a)。 电接触垫(15)位于所述电连接区域和所述空腔的一个表面(12)之间。 电接触条(14)被支撑在晶片(7)上并延伸出空腔的所述表面(12)以与所述接触垫接触。 一层粘合剂(18)在所述组装表面(2a,7a)之间延伸。 所述条带(14)延伸穿过所述晶片的组装表面之间以进行外部连接,并且位于所述透明衬垫旁边的晶片设置有位于光学传感器对面的开口。

    Optical semiconductor device, has IC chip casing enclosing optical sensors

    公开(公告)号:FR2835653A1

    公开(公告)日:2003-08-08

    申请号:FR0201429

    申请日:2002-02-06

    Inventor: PRIOR CHRISTOPHE

    Abstract: The device has an integrated circuit chip having in its front face, an optical sensor, and a plate-support on whose front face is fixed the rear face of the integrated circuit chip and electric connection members connecting the plate support to the IC chip. There is a protection ring (7) fixed on the front face of the chip (3), around, and at a distance to the optical sensor (6), and a ring (13) of a coating material, surrounding the periphery of the chip, and extending between the front face of the plate-support and this protection ring.

    5.
    发明专利
    未知

    公开(公告)号:FR2819936A1

    公开(公告)日:2002-07-26

    申请号:FR0100815

    申请日:2001-01-22

    Inventor: PRIOR CHRISTOPHE

    Abstract: The invention concerns a method for making a semiconductor package and a semiconductor package containing integrated circuit chips having a front surface with electrical connection zones, wherein a first multilayer wafer (2) comprising an assembling surface (2a) is provided with an adhesive layer (8) and has feedthroughs (9); and a second wafer (3) has a recess (13) provided in an assembling surface (3a) fixed to the assembling surface of the first wafer through said adhesive layer; said chip (4) being arranged in said recess in a position such that its front surface is fixed to the assembling surface of the first wafer through said adhesive layer and its electrical connection zones are located opposite the feedthroughs of said first wafer, and the base of the recess of said second wafer being supported on the rear surface of the chip opposite the front surface.

    6.
    发明专利
    未知

    公开(公告)号:DE60227633D1

    公开(公告)日:2008-08-28

    申请号:DE60227633

    申请日:2002-11-13

    Inventor: PRIOR CHRISTOPHE

    Abstract: The semiconductor casing (1) comprises the support and electrical connection means in the form of a plate (2) with a cavity (4), a semiconductor component (8) whose front face (9) carries a sensor (10) and whose rear face (11) is supported at the bottom (5) of the cavity (4), and the positioning and locking means which include a ring insert (14) of elastic or thermo-plastic material such as silicone inserted in the space (12) between the semiconductor component and the wall of the cavity. The cavity wall (7) is counter-inclined, and the ring insert (14) is self-locked by wedging in the space (12). The encapsulation means include a ring wall (18) supported on the plate (2) and a transparent plate (20) mounted at a distance from the semiconductor component (8). In the second embodiment, the positioning and locking means include four corner inserts for holding the semiconductor component in the position with lower parts engaged in holes made in the bottom of the cavity and lateral parts supported on the front face of the support plate. The inserts are bonded to the support plate by an adhesive layer between the lateral parts of inserts and the front face of the support plate.

    7.
    发明专利
    未知

    公开(公告)号:FR2819634B1

    公开(公告)日:2004-01-16

    申请号:FR0100473

    申请日:2001-01-15

    Inventor: PRIOR CHRISTOPHE

    Abstract: A semiconductor package includes a mounting and electrical connection plate, and a semiconductor component having front and rear surfaces and including a sensor. The rear surface of the semiconductor component is attached to the mounting and electrical connection plate and the front surface is attached to the sensor. An insert is adjacent the front face of the semiconductor component and the sensor and has an access passage for exposing the sensor. A plug is in the access passage of the insert. A body of encapsulation material surrounds the mounting and electrical connection plate, the semiconductor component and the insert.

    8.
    发明专利
    未知

    公开(公告)号:FR2819936B1

    公开(公告)日:2003-05-30

    申请号:FR0100815

    申请日:2001-01-22

    Inventor: PRIOR CHRISTOPHE

    Abstract: Method of fabricating a semiconductor package and semiconductor package containing an integrated circuit chip having, on one front face, electrical connection regions, in which a first multilayer plate ( 2 ) comprising an assembly face ( 2 a) is furnished with an adhesive layer ( 8 ) and which has through-holes ( 9 ); and a second plate ( 3 ) has a recess ( 13 ) made in one assembly face ( 3 a) fastened to the assembly face of the first plate via the said adhesive layer; the said chip ( 4 ) being placed in the said recess in a position such that its front face is fastened to the assembly face of the first plate via the said adhesive layer and that its electrical connection regions are located facing the through-holes of this first plate, and the bottom of the recess of the said second plate bearing against the rear face of the chip opposite the front face.

    9.
    发明专利
    未知

    公开(公告)号:FR2819940A1

    公开(公告)日:2002-07-26

    申请号:FR0100816

    申请日:2001-01-22

    Inventor: PRIOR CHRISTOPHE

    Abstract: The invention relates to a method for producing an optical semiconductor box and said optical semiconductor box, housing an integrated circuit chip, the front surface of which is provided with an optical sensor and electrical connection areas distributed around said sensor, in which a transparent pad (6) extends out in front of the front face of the chip without covering the electrical connection areas of said chip. Wafers (2, 7) define a cavity (10) between them, in which the chip and the transparent pad are stacked and said wafers are provided with annular assembly surfaces (2a, 7a). Electrical contact pads (15) are positioned between said electrical connection areas and one surface (12) of said cavity. Electrical contact strips (14) are supported on a wafer (7) and extend out over said surface (12) of the cavity to make contact with said contact pads. A layer of adhesive (18) extends between said assembly surfaces (2a, 7a). Said strips (14) extend to pass between the assembly surfaces of said wafers in order to make external connections and the wafer which is located beside said transparent pad is provided with an opening located opposite the optical sensor.

    10.
    发明专利
    未知

    公开(公告)号:FR2832252B1

    公开(公告)日:2004-03-12

    申请号:FR0114739

    申请日:2001-11-14

    Inventor: PRIOR CHRISTOPHE

    Abstract: The semiconductor casing (1) comprises the support and electrical connection means in the form of a plate (2) with a cavity (4), a semiconductor component (8) whose front face (9) carries a sensor (10) and whose rear face (11) is supported at the bottom (5) of the cavity (4), and the positioning and locking means which include a ring insert (14) of elastic or thermo-plastic material such as silicone inserted in the space (12) between the semiconductor component and the wall of the cavity. The cavity wall (7) is counter-inclined, and the ring insert (14) is self-locked by wedging in the space (12). The encapsulation means include a ring wall (18) supported on the plate (2) and a transparent plate (20) mounted at a distance from the semiconductor component (8). In the second embodiment, the positioning and locking means include four corner inserts for holding the semiconductor component in the position with lower parts engaged in holes made in the bottom of the cavity and lateral parts supported on the front face of the support plate. The inserts are bonded to the support plate by an adhesive layer between the lateral parts of inserts and the front face of the support plate.

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