公开(公告)号：DE60236074D1

公开(公告)日：2010-06-02

申请号：DE60236074

申请日：2002-07-02

Applicant: ST MICROELECTRONICS SRL

Inventor： ROVATI FABRIZIO SIMONE ,  BORNEO ANTONIO MARIA ,  PAU DANILO PIETRO

IPC: G06F9/38

公开(公告)号：DE60228262D1

公开(公告)日：2008-09-25

申请号：DE60228262

申请日：2002-11-01

Applicant: SGS THOMSON MICROELECTRONICS ,  ST MICROELECTRONICS SRL

Inventor： HOMEWOOD MARK OWEN ,  BORNEO ANTONIO MARIA

IPC: G06F13/38

Abstract: A first-in-first out (FIFO) memory (16) that is connected to a stream register unit (5) by a communication channel (8), receives data from a peripheral. The data is supplied from the memory to the stream register unit through the channel. A memory bus (3) is connected between a data memory and a processor, through which the processor accesses the randomly accessible data. Independent claims are also included for the following: (1) processing unit; (2) streaming data handling system; and (3) stream register.