2.
    发明专利
    未知

    公开(公告)号:DE69514502T2

    公开(公告)日:2000-08-03

    申请号:DE69514502

    申请日:1995-05-05

    Abstract: A memory array (2) is divided, at the design stage, into a plurality of elementary sectors (4); depending on the specific application and the requirements of the user, the elementary sectors are grouped into composite sectors (34) of desired size and number; a correlating unit (31) memorizes the correlation between each composite sector and the elementary sectors; and, to address a composite sector, the relative address (32) is supplied to the correlating unit (31) which provides for addressing the elementary sectors (4) associated with the addressed composite sector on the basis of the memorized correlation table.

    4.
    发明专利
    未知

    公开(公告)号:DE69514502D1

    公开(公告)日:2000-02-17

    申请号:DE69514502

    申请日:1995-05-05

    Abstract: A memory array (2) is divided, at the design stage, into a plurality of elementary sectors (4); depending on the specific application and the requirements of the user, the elementary sectors are grouped into composite sectors (34) of desired size and number; a correlating unit (31) memorizes the correlation between each composite sector and the elementary sectors; and, to address a composite sector, the relative address (32) is supplied to the correlating unit (31) which provides for addressing the elementary sectors (4) associated with the addressed composite sector on the basis of the memorized correlation table.

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