公开(公告)号：DE60216268D1

公开(公告)日：2007-01-04

申请号：DE60216268

申请日：2002-08-08

Applicant: ST MICROELECTRONICS SRL

Inventor： BARONE MASSIMILIANO ,  GRISETA ANTONIO

IPC: G06F11/267 ,  G01R31/3187 ,  G06F11/27

Abstract: A built-in self-test (BIST) circuit adapted to be embedded in an integrated circuit (101) for testing the integrated circuit, including in particular a collection of addressable elements, for example a semiconductor memory. The BIST circuit comprises a general-purpose data processor (105) programmable for executing a test program for testing the integrated circuit. The BIST circuit comprises an accelerator circuit (113) cooperating with the general-purpose data processor for autonomously conducting operations on the integrated circuit according to the test program. The accelerator circuit comprises configuration means (201,203,233,301,303,501) adapted to be loaded with configuration parameters for adapting the accelerator circuit to the specific type of integrated circuit and the specific type of test program. (FIG. 1)

公开(公告)号：DE602005020595D1

公开(公告)日：2010-05-27

申请号：DE602005020595

申请日：2005-05-19

Applicant: ST MICROELECTRONICS SRL

Inventor： GRISETA ANTONIO ,  LONIGRO ANTONIO ,  MAZZONE ANGELO

IPC: G06F11/10

公开(公告)号：DE602005020432D1

公开(公告)日：2010-05-20

申请号：DE602005020432

申请日：2005-05-19

Applicant: ST MICROELECTRONICS SRL

Inventor： GRISETA ANTONIO ,  MAZZONE ANGELO

IPC: G06F11/10