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    3.
    发明专利
    未知

    公开(公告)号：DE69613118T2

    公开(公告)日：2001-10-25

    申请号：DE69613118

    申请日：1996-07-31

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BORGHI MARIA ROSA ,  MAGAZZU ANTONIO

    IPC: G05F1/46 ,  G05F1/00 ,  H02M3/155

    Abstract: The invention concerns a method of controlling the charging of a bootstrap capacitance (CBOOT) incorporated into a switching regulator (2) of a power transistor (M1). The method consists of carrying out, at each switching cycle, a comparison between the voltage value (VCBOOT) at the bootstrap capacitance (CBOOT) and a predetermined threshold voltage (Vs), to change the mode of operation of the regulator following said comparison. More particularly, the control on the transistor (M1) is taken off the regulator (2) when the voltage (VCBOOT) at the bootstrap capacitance (CBOOT) is lower than the threshold voltage (Vs), while the transistor (M1) is forced into the "on" state through a full cycle. In this way, the minimum current (IMIN) to operate the regulator (2) can be minimised.

    4.
    发明专利
    未知

    公开(公告)号：DE69613118D1

    公开(公告)日：2001-07-05

    申请号：DE69613118

    申请日：1996-07-31

    Applicant: ST MICROELECTRONICS SRL

    Inventor： BORGHI MARIA ROSA ,  MAGAZZU ANTONIO

    IPC: G05F1/46 ,  G05F1/00 ,  H02M3/155

    Abstract: The invention concerns a method of controlling the charging of a bootstrap capacitance (CBOOT) incorporated into a switching regulator (2) of a power transistor (M1). The method consists of carrying out, at each switching cycle, a comparison between the voltage value (VCBOOT) at the bootstrap capacitance (CBOOT) and a predetermined threshold voltage (Vs), to change the mode of operation of the regulator following said comparison. More particularly, the control on the transistor (M1) is taken off the regulator (2) when the voltage (VCBOOT) at the bootstrap capacitance (CBOOT) is lower than the threshold voltage (Vs), while the transistor (M1) is forced into the "on" state through a full cycle. In this way, the minimum current (IMIN) to operate the regulator (2) can be minimised.

    6.
    发明专利
    未知

    公开(公告)号：DE69630112T2

    公开(公告)日：2004-08-26

    申请号：DE69630112

    申请日：1996-07-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MAGAZZU ANTONIO ,  FERRARIO BRUNO

    IPC: G06F1/12 ,  G06F1/10 ,  H03L7/00 ,  H04L7/00 ,  H04L7/033

    Abstract: A synchronization circuit (1) for electronic devices and components, being of the type which comprises an internal synchronization signal (5) generator (4) and an input/output terminal (A) whereat an external synchronization signal (SINC) can be received, or the internal synchronization signal (5) can be supplied from the circuit (1), further comprises a comparator block (6) being input both said signals and having a control output for supplying said terminal (A) with the signal (SINC,5) corresponding to the master/slave mode of operation of the synchronization circuit. The invention also concerns a method of generating and supplying a synchronization signal to a plurality of electronic devices (18) being operated as slave devices to a synchronization circuit (1) acting as the master device.

    7.
    发明专利
    未知

    公开(公告)号：DE69630112D1

    公开(公告)日：2003-10-30

    申请号：DE69630112

    申请日：1996-07-24

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MAGAZZU ANTONIO ,  FERRARIO BRUNO

    IPC: G06F1/12 ,  G06F1/10 ,  H03L7/00 ,  H04L7/00 ,  H04L7/033

    Abstract: A synchronization circuit (1) for electronic devices and components, being of the type which comprises an internal synchronization signal (5) generator (4) and an input/output terminal (A) whereat an external synchronization signal (SINC) can be received, or the internal synchronization signal (5) can be supplied from the circuit (1), further comprises a comparator block (6) being input both said signals and having a control output for supplying said terminal (A) with the signal (SINC,5) corresponding to the master/slave mode of operation of the synchronization circuit. The invention also concerns a method of generating and supplying a synchronization signal to a plurality of electronic devices (18) being operated as slave devices to a synchronization circuit (1) acting as the master device.

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