1.
    发明专利
    未知

    公开(公告)号:DE69429660D1

    公开(公告)日:2002-02-21

    申请号:DE69429660

    申请日:1994-10-07

    Abstract: Distorting effects and disturbances caused by abrupt voltage changes on the output nodes of a pair of selfconfiguring amplifiers for alternatively driving in a bridge mode or in a single-ended mode by one amplifier of the pair a certain load, in function of the level of the input signal, because of the enabling/disabling of a common mode control loop, are effectively eliminated by storing the voltage of a common mode control node of the pair of amplifiers on a capacitance during a phase of disabling of said common mode control loop. Abrupt voltage drops and recoveries at the switching instants are prevented.

    2.
    发明专利
    未知

    公开(公告)号:DE69426935T2

    公开(公告)日:2001-08-02

    申请号:DE69426935

    申请日:1994-12-30

    Abstract: A semiconductor electronic circuit with a protection device against supply voltage overloading, being of the type which comprises a first power circuit portion (2) connected to a power supply line (AL) and enabled through at least a first transistor (Q1). This transistor (Q1) has a control terminal driven by a voltage sensor (R1, R2, Z1) connected to the power supply line (AL). The semiconductor electronic circuit (1) is characterized, moreover, in that it comprises a second signal circuit portion (3) connected to the power supply line (AL) in a structurally independent manner of the first power circuit portion (2) and through a controlled switch (M1).

    3.
    发明专利
    未知

    公开(公告)号:DE69429660T2

    公开(公告)日:2002-11-14

    申请号:DE69429660

    申请日:1994-10-07

    Abstract: Distorting effects and disturbances caused by abrupt voltage changes on the output nodes of a pair of selfconfiguring amplifiers for alternatively driving in a bridge mode or in a single-ended mode by one amplifier of the pair a certain load, in function of the level of the input signal, because of the enabling/disabling of a common mode control loop, are effectively eliminated by storing the voltage of a common mode control node of the pair of amplifiers on a capacitance during a phase of disabling of said common mode control loop. Abrupt voltage drops and recoveries at the switching instants are prevented.

    4.
    发明专利
    未知

    公开(公告)号:DE69426935D1

    公开(公告)日:2001-04-26

    申请号:DE69426935

    申请日:1994-12-30

    Abstract: A semiconductor electronic circuit with a protection device against supply voltage overloading, being of the type which comprises a first power circuit portion (2) connected to a power supply line (AL) and enabled through at least a first transistor (Q1). This transistor (Q1) has a control terminal driven by a voltage sensor (R1, R2, Z1) connected to the power supply line (AL). The semiconductor electronic circuit (1) is characterized, moreover, in that it comprises a second signal circuit portion (3) connected to the power supply line (AL) in a structurally independent manner of the first power circuit portion (2) and through a controlled switch (M1).

Patent Agency Ranking