LEVEL SHIFT CIRCUIT
    1.
    发明专利

    公开(公告)号:JPH0856148A

    公开(公告)日:1996-02-27

    申请号:JP11264895

    申请日:1995-04-14

    Abstract: PURPOSE: To obtain a voltage shift circuit operable with high voltage by supplying a grounded correlation signal for an output encoding the same information as a high voltage correlation signal by an input. CONSTITUTION: The level shift circuit 1 of voltage input signals S and SN show at least first and second high voltage levels and the circuit is composed of two branches, each of which consists of current modulators 6, 7, 9, 14, 15, 17 and signal converters 8 and 16. A current modulator is supplied with two signals of mutually opposite phases to generate current signals I7 and I15 being values depending on the level of each input signal and a signal converter converts a current signal to ground related voltage signals V1 and V2. The signal converter forms a signal terminating differential circuit 20 and the output 21 of the circuit 20 shows a low voltage digital signal which can be generated by a normal digital circuit and receives no influence by a noise or the fluctuation of supply voltage.

    DC -DC CONVERTER OPERATING IN DISCONTINUOUS MODE

    公开(公告)号:JPH07177731A

    公开(公告)日:1995-07-14

    申请号:JP28424394

    申请日:1994-10-24

    Abstract: PURPOSE: To secure a discontinuous mode, while minimizing the number of leads by equipping a DC-to-DC converter with a comparator which generates an off signal, when it goes beyond a set value, a comparator which generates a switch off confirmation signal, and a means which masks the off signal. CONSTITUTION: A transistor(Tr)M1 is made conducting, and an inductor(ID)LEXT is charged, and the voltage VD is sensed with a comparator(CM)C2 . When the voltage VD reaches a voltage VREF2 , the output of the CM2 is switched from L to H, and the input of LOGIC is made H, and TrM1 is turned off. At this time, a voltage IDLEXT is discharged to a capacitor CEXT and load through a diode D. A current path, which is monitored with resistors R1 and R2 and a TrT2 and passes through the diode D, is sensed with CMC3, and it prevents the on of TrM1 , as long as the discharge current of the inductor is continued, confirming the L of the S input of FF. When the voltage monitored with CMC1 falls under a voltage VREF1 , the output of CMC1 becomes L, and TrM1 is turned on.

    3.
    发明专利
    未知

    公开(公告)号:DE69422138T2

    公开(公告)日:2000-04-20

    申请号:DE69422138

    申请日:1994-08-05

    Abstract: A converter employs a comparator (C3) sensing the current through an output diode (D), for generating a confirmation signal of an OFF state of the switch (M1) until the discharge current of the inductor (L) toward the user circuit and the external filter capacitance (C) has become null, thus ensuring the operation in a discontinuous mode under any condition. A turn-off signal of the switch (M1) is provided by another comparator (C2) which, instead of the voltage on a sensing resistance connected in series with the switch, may sense the voltage across the switch (M1) itself. This latter embodiment is particularly suited in case of an output MOS transistor and the circuit comprises means for masking for a preset period of time the turn-off signal produced by said comparator (C2), in order to allow a predefined turn-on phase of the switch. Enabling of the turn-on of the switch (M1) is conventionally provided by a dedicated (third) comparator (C1) of the output voltage. The circuit does not require the use of an error amplifier, for the compensation of which special complex integratable circuits or alternatively access to the output node of the error amplifier through a dedicated pin may be needed.

    4.
    发明专利
    未知

    公开(公告)号:IT1268474B1

    公开(公告)日:1997-03-04

    申请号:ITVA930024

    申请日:1993-10-22

    Abstract: A converter employs a comparator (C3) sensing the current through an output diode (D), for generating a confirmation signal of an OFF state of the switch (M1) until the discharge current of the inductor (L) toward the user circuit and the external filter capacitance (C) has become null, thus ensuring the operation in a discontinuous mode under any condition. A turn-off signal of the switch (M1) is provided by another comparator (C2) which, instead of the voltage on a sensing resistance connected in series with the switch, may sense the voltage across the switch (M1) itself. This latter embodiment is particularly suited in case of an output MOS transistor and the circuit comprises means for masking for a preset period of time the turn-off signal produced by said comparator (C2), in order to allow a predefined turn-on phase of the switch. Enabling of the turn-on of the switch (M1) is conventionally provided by a dedicated (third) comparator (C1) of the output voltage. The circuit does not require the use of an error amplifier, for the compensation of which special complex integratable circuits or alternatively access to the output node of the error amplifier through a dedicated pin may be needed.

    5.
    发明专利
    未知

    公开(公告)号:ITVA930024D0

    公开(公告)日:1993-10-22

    申请号:ITVA930024

    申请日:1993-10-22

    Abstract: A converter employs a comparator (C3) sensing the current through an output diode (D), for generating a confirmation signal of an OFF state of the switch (M1) until the discharge current of the inductor (L) toward the user circuit and the external filter capacitance (C) has become null, thus ensuring the operation in a discontinuous mode under any condition. A turn-off signal of the switch (M1) is provided by another comparator (C2) which, instead of the voltage on a sensing resistance connected in series with the switch, may sense the voltage across the switch (M1) itself. This latter embodiment is particularly suited in case of an output MOS transistor and the circuit comprises means for masking for a preset period of time the turn-off signal produced by said comparator (C2), in order to allow a predefined turn-on phase of the switch. Enabling of the turn-on of the switch (M1) is conventionally provided by a dedicated (third) comparator (C1) of the output voltage. The circuit does not require the use of an error amplifier, for the compensation of which special complex integratable circuits or alternatively access to the output node of the error amplifier through a dedicated pin may be needed.

    9.
    发明专利
    未知

    公开(公告)号:DE69422138D1

    公开(公告)日:2000-01-20

    申请号:DE69422138

    申请日:1994-08-05

    Abstract: A converter employs a comparator (C3) sensing the current through an output diode (D), for generating a confirmation signal of an OFF state of the switch (M1) until the discharge current of the inductor (L) toward the user circuit and the external filter capacitance (C) has become null, thus ensuring the operation in a discontinuous mode under any condition. A turn-off signal of the switch (M1) is provided by another comparator (C2) which, instead of the voltage on a sensing resistance connected in series with the switch, may sense the voltage across the switch (M1) itself. This latter embodiment is particularly suited in case of an output MOS transistor and the circuit comprises means for masking for a preset period of time the turn-off signal produced by said comparator (C2), in order to allow a predefined turn-on phase of the switch. Enabling of the turn-on of the switch (M1) is conventionally provided by a dedicated (third) comparator (C1) of the output voltage. The circuit does not require the use of an error amplifier, for the compensation of which special complex integratable circuits or alternatively access to the output node of the error amplifier through a dedicated pin may be needed.

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