-
公开(公告)号:ITVA20020017A1
公开(公告)日:2003-08-21
申请号:ITVA20020017
申请日:2002-02-21
Applicant: ST MICROELECTRONICS SRL
Inventor: PAPPALARDO DOMENICO , GAIBOTTI MAURIZIO
IPC: H02M3/07
Abstract: The charge pump uses PMOS transistors for implementing the first and the second charge transfer switches of the charge pump. Substantially, the closing and opening of the first switch through which the first capacitor is charged, of the second switch for transferring the electric charge from the first capacitor to the load capacitance connected to the output node of the circuit and of the third switch for discharging to ground the load capacitance, are driven by a logic NOR gate. A first input of the NOR gate is connected to a common control node of the PMOS transistor forming the second switch and of a NMOS transistor forming the third switch, a second inverting input is connected to the output node, and the output is connected to the first capacitor.
-
公开(公告)号:ITMI20040309A1
公开(公告)日:2004-05-24
申请号:ITMI20040309
申请日:2004-02-24
Applicant: ST MICROELECTRONICS SRL
Inventor: PALUMBO GAETANO , PAPPALARDO DOMENICO , UCCIARDELLO CARMELO
IPC: G05F1/10
-
公开(公告)号:ITVA20020017D0
公开(公告)日:2002-02-21
申请号:ITVA20020017
申请日:2002-02-21
Applicant: ST MICROELECTRONICS SRL
Inventor: PAPPALARDO DOMENICO , GAIBOTTI MAURIZIO
IPC: H02M3/07
Abstract: The charge pump uses PMOS transistors for implementing the first and the second charge transfer switches of the charge pump. Substantially, the closing and opening of the first switch through which the first capacitor is charged, of the second switch for transferring the electric charge from the first capacitor to the load capacitance connected to the output node of the circuit and of the third switch for discharging to ground the load capacitance, are driven by a logic NOR gate. A first input of the NOR gate is connected to a common control node of the PMOS transistor forming the second switch and of a NMOS transistor forming the third switch, a second inverting input is connected to the output node, and the output is connected to the first capacitor.
-
-