公开(公告)号：DE60208012D1

公开(公告)日：2006-01-19

申请号：DE60208012

申请日：2002-07-03

Applicant: ST MICROELECTRONICS SRL

Inventor： PAU DANILO PIETRO ,  PICCINELLI EMILIANO MARIO ANGE ,  SANNINO ROBERTO

IPC: G06F9/45 ,  H03M7/30 ,  H03M7/40

Abstract: Binary words are converted between a non-encoded format (OP) and a compressed encoded format (V), in which the binary words are, at least in part, represented by encoded bit sequences that are shorter than the respective binary word in the non-encoded format. The shortest encoded bit sequences are selected according to the statistical recurrence of the respective words in the non-encoded format, and associated to the binary words with higher recurrence are encoded bit sequences comprising bit numbers that are accordingly smaller. The correspondence between binary words in non-encoded format and the encoded bit sequences associated to them is established by means of indices of an encoding vocabulary. The conversion process comprises the operations of: arranging the indices according to an ordered sequence; organizing the sequence of indices into groups of vectors (GV); splitting each group of vectors into a given number of vectors (V); and encoding the vectors (V) independently from one another. Alternatively, for each group of vectors, at the end of the encoding process, calculation is carried out - the result being saved in a table, referred to as address-translation table (ATT) - of the starting address on 32 bits of the compressed block or of the differences, expressed in bytes, with respect to the last complete address appearing in said table (ATT).