公开(公告)号：JP2642904B2

公开(公告)日：1997-08-20

申请号：JP13179495

申请日：1995-05-30

Applicant: ST MICROELECTRONICS SRL

Inventor： RAVANELLI ENRICO ,  ZULLINO LUCIA

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/02 ,  H01L27/06

公开(公告)号：JPH0878630A

公开(公告)日：1996-03-22

申请号：JP13179495

申请日：1995-05-30

Applicant: ST MICROELECTRONICS SRL

Inventor： RAVANELLI ENRICO ,  ZULLINO LUCIA

IPC: H01L27/04 ,  H01L21/822 ,  H01L27/02 ,  H01L27/06

Abstract: PURPOSE: To provide a small area protective device, having high efficiency in energy and response speed, which protects a semiconductor MOS integrated circuit from electrostatic discharges on an input/output terminal. CONSTITUTION: A first region 15 and a third region 20 of a second conductivity- type N are separately protruded into a first conductivity-type P surface zones 12 and 13 from the main surface of a wafer, a second region 18 is protruded into a first region 15, and a SCR, having terminals 22 and 24 of a conductive material, which is brought into ohmic contact with the second region 18 and the third region 20, is provided. In the device, having a reverse breakdown potential, in which the joint part of the first region 15 and the surface zones 12 and 13 prescribe the starting potential of the SCR, a conductive layer 17 is insulated from the first region 15 and is extended crossing the edge part of the conductive layer 17. The reverse breakdown potential of the joint part can be decreased to the prescribed value, and polarity can be given to the conductive layer 17, so that the distribution of the electric field on the junction part can be changed.

公开(公告)号：ITMI982003A1

公开(公告)日：2000-03-14

申请号：ITMI982003

申请日：1998-09-14

Applicant: ST MICROELECTRONICS SRL

Inventor： PULVIRENTI FRANCESCO ,  RAVANELLI ENRICO

IPC: H01L27/02 ,  H01L27/092

Abstract: The present invention relates to a circuit device for protection against electrostatic discharge, and being immune to the latch-up phenomenon. The circuit device is of the integrated type in a portion of a semiconductor integrated circuit. The device includes an active limiting element and a resistor connected in series between a terminal of the active element connected to an input/output pin of the integrated circuit, and a terminal of a circuit to be protected. The active element is a bipolar transistor having a base terminal and an emitter-acting collector terminal connected together. The distributed resistor is formed in an emitter-acting collector region of the transistor which is diffused and elongated at the surface inside a base pocket of the transistor.

公开(公告)号：IT1302208B1

公开(公告)日：2000-09-05

申请号：ITMI982003

申请日：1998-09-14

Applicant: ST MICROELECTRONICS SRL

Inventor： PULVIRENTI FRANCESCO ,  RAVANELLI ENRICO

IPC: H01L27/02 ,  H01L27/092

Abstract: The present invention relates to a circuit device for protection against electrostatic discharge, and being immune to the latch-up phenomenon. The circuit device is of the integrated type in a portion of a semiconductor integrated circuit. The device includes an active limiting element and a resistor connected in series between a terminal of the active element connected to an input/output pin of the integrated circuit, and a terminal of a circuit to be protected. The active element is a bipolar transistor having a base terminal and an emitter-acting collector terminal connected together. The distributed resistor is formed in an emitter-acting collector region of the transistor which is diffused and elongated at the surface inside a base pocket of the transistor.