公开(公告)号：DE60301851D1

公开(公告)日：2005-11-17

申请号：DE60301851

申请日：2003-02-28

Applicant: ST MICROELECTRONICS SRL

Inventor： MARTINES IGNAZIO ,  TORRISI DAVIDE

IPC: G11C16/10 ,  G11C16/12 ,  G11C16/34

Abstract: The present invention relates to a gate voltage regulation system for the programming and/or soft programming phase of non volatile memory cells, for example of the Flash type, with low circuit area occupation, wherein memory cells (5) are organised in cell matrices with corresponding circuits responsible for addressing, decoding, reading, writing and erasing the memory cell content; the cells having gate terminals (G) biased in the programming phase with a predetermined voltage value by means of charge pump voltage regulators. Advantageously, a first (ST1) and a second (ST2) regulation stages are provided, being structurally independent, responsible for the programming and soft programming phase respectively; the first stage (ST1) generating a supply voltage for said second stage (ST2).

公开(公告)号：ITVA20040019A1

公开(公告)日：2004-08-04

申请号：ITVA20040019

申请日：2004-05-04

Applicant: ST MICROELECTRONICS SRL

Inventor： MARTINES IGNAZIO ,  TORRISI DAVIDE

IPC: G11C16/04 ,  G11C29/24

公开(公告)号：ITMI20052350A1

公开(公告)日：2007-06-10

申请号：ITMI20052350

申请日：2005-12-09

Applicant: ST MICROELECTRONICS SRL

Inventor： NOCITA EDOARDO ,  TORRISI DAVIDE ,  TUMMINIA ALESSANDRO

公开(公告)号：ITVA20040020A1

公开(公告)日：2004-08-04

申请号：ITVA20040020

申请日：2004-05-04

Applicant: ST MICROELECTRONICS SRL

Inventor： MARTINES IGNAZIO ,  TORRISI DAVIDE

IPC: G11C8/00 ,  G11C16/24