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公开(公告)号:JPH08274135A
公开(公告)日:1996-10-18
申请号:JP23427495
申请日:1995-09-12
Applicant: ST MICROELECTRONICS SRL
Inventor: MURARI BRUNO , TOSCANI ROBERTO , MARCHIO' FABIO , STORTI SANDRO
IPC: H01L21/66 , G01R31/28 , H01L21/822 , H01L23/58 , H01L27/02 , H01L27/04 , H05K1/02 , H05K1/03 , H05K3/00
Abstract: PROBLEM TO BE SOLVED: To obtain a new manufacturing method of an electronic circuit, which can recognize defective circuit simply, economically and quickly in the electric inspection. SOLUTION: On a semiconductor substrate 1, an electronic circuit and electric connecting lines 12 used for the diagnosis purpose are integrated on the semiconductor substrate 1 under the regulary separated pattern by scribing lines 11 in the single structure.
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公开(公告)号:DE69432016D1
公开(公告)日:2003-02-20
申请号:DE69432016
申请日:1994-09-13
Applicant: ST MICROELECTRONICS SRL
Inventor: MURARI BRUNO , TOSCANI ROBERTO , MARCHIO' FABIO , STORTI SANDRO
IPC: H01L21/66 , G01R31/28 , H01L21/822 , H01L23/58 , H01L27/02 , H01L27/04 , H05K1/02 , H05K1/03 , H05K3/00
Abstract: Manufacturing method for electronic circuits (2) integrated monolithically on a semiconductor support (1) on which said electronic circuits (2) are regularly spaced apart by dividing scribing lines (11) and a network of electrical connection lines (12) used for diagnostic purposes in the wafer of semiconductor material on which are provided the integrated electronic circuits (2). In this manner it is possible to simultaneously perform electrical testing of all the circuits present on the same wafer.
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公开(公告)号:DE69432016T2
公开(公告)日:2004-01-08
申请号:DE69432016
申请日:1994-09-13
Applicant: ST MICROELECTRONICS SRL
Inventor: MURARI BRUNO , TOSCANI ROBERTO , MARCHIO' FABIO , STORTI SANDRO
IPC: H01L21/66 , G01R31/28 , H01L21/822 , H01L23/58 , H01L27/02 , H01L27/04 , H05K1/02 , H05K1/03 , H05K3/00
Abstract: Manufacturing method for electronic circuits (2) integrated monolithically on a semiconductor support (1) on which said electronic circuits (2) are regularly spaced apart by dividing scribing lines (11) and a network of electrical connection lines (12) used for diagnostic purposes in the wafer of semiconductor material on which are provided the integrated electronic circuits (2). In this manner it is possible to simultaneously perform electrical testing of all the circuits present on the same wafer.
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