公开(公告)号：ITMI992149D0

公开(公告)日：1999-10-14

申请号：ITMI992149

申请日：1999-10-14

Applicant: ST MICROELECTRONICS SRL

Inventor： CONTE ANTONINO ,  GAIBOTTI MAURIZIO ,  ZERILLI TOSSAMO

IPC: G11C7/06 ,  G11C7/14

Abstract: A bias circuit for read amplifier circuits for memories includes at least one first circuit branch formed by a first pair of MOS transistors connected between a supply voltage and ground. The first pair of MOS transistors includes a P-channel diode connected transistor and an N-channel transistor connected in series, with an enable transistor interposed therebetween. The first circuit branch drives a capacitive load for coupling to the supply voltage. The bias circuit further includes reference current amplifier circuit branches for amplifying a reference current which flows in the first circuit branch for charging the capacitive load. A circuit portion, which controls the charging current of the capacitive load, includes a feedback loop between the reference current amplifier circuit branches and the capacitive load.

公开(公告)号：ITMI992149A1

公开(公告)日：2001-04-16

申请号：ITMI992149

申请日：1999-10-14

Applicant: ST MICROELECTRONICS SRL

Inventor： CONTE ANTONINO ,  GAIBOTTI MAURIZIO ,  ZERILLI TOSSAMO

IPC: G11C7/06 ,  G11C7/14

Abstract: A bias circuit for read amplifier circuits for memories includes at least one first circuit branch formed by a first pair of MOS transistors connected between a supply voltage and ground. The first pair of MOS transistors includes a P-channel diode connected transistor and an N-channel transistor connected in series, with an enable transistor interposed therebetween. The first circuit branch drives a capacitive load for coupling to the supply voltage. The bias circuit further includes reference current amplifier circuit branches for amplifying a reference current which flows in the first circuit branch for charging the capacitive load. A circuit portion, which controls the charging current of the capacitive load, includes a feedback loop between the reference current amplifier circuit branches and the capacitive load.