公开(公告)号：DE69525048D1

公开(公告)日：2002-02-21

申请号：DE69525048

申请日：1995-07-27

Applicant: ST MICROELECTRONICS SRL ,  CONS RIC MICROELETTRONICA

Inventor： LEONARDI SALVATORE ,  LIZZIO PIETRO ,  PATTI DAVIDE GIUSEPPE ,  PALARA SERGIO

IPC: H01L21/331 ,  H01L29/10 ,  H01L29/732

Abstract: A vertical PNP transistor integrated in a semiconductor material wafer having an N type substrate (40) and an N type epitaxial layer (41) forming a surface (42). The transistor has a P type buried collector region (43) astride the substrate and the epitaxial layer; a collector sinker (44) insulating an epitaxial tub (45) from the rest of the wafer; a gain-modulating N type buried base region (46; 46'; 46'') astride the buried collector region and the epitaxial tub, and forming a base region with the epitaxial tub; and a P type emitter region in the epitaxial tub. An N type base sinker (47) extends from the surface, through the epitaxial tub to the buried base region. The gain of the transistor may be modulated by varying the extension and dope concentration of the buried base region (46), forming a constant or variable dope concentration profile of the buried base region (46), providing or not a base sinker (47), and varying the form and distance of the base sinker from the emitter region.