COMMUNICATION INTERFACE FOR INTERFACING A TRANSMISSION CIRCUIT WITH AN INTERCONNECTION NETWORK, AND CORRESPONDING SYSTEM AND INTEGRATED CIRCUIT
    1.
    发明申请
    COMMUNICATION INTERFACE FOR INTERFACING A TRANSMISSION CIRCUIT WITH AN INTERCONNECTION NETWORK, AND CORRESPONDING SYSTEM AND INTEGRATED CIRCUIT 审中-公开
    用于连接具有互连网络的传输电路的通信接口以及相关系统和集成电路

    公开(公告)号:WO2014191966A1

    公开(公告)日:2014-12-04

    申请号:PCT/IB2014/061839

    申请日:2014-05-30

    Abstract: A communication interface (921) for interfacing a transmission circuit (901) with an interconnection network (701), wherein the transmission circuit (901) requests via a transmission request transmission of a predetermined amount of data. In particular, the communication interface (921) receives data segments from the transmission circuit (901), stores the data segments in a memory (922), and verifies whether the memory (922) contains the predetermined amount of data. In the case where the memory (922) contains the predetermined amount of data, the communication interface (921) starts transmission (924) of the data stored in the memory (922). Instead, in the case where the memory (922) contains an amount of data that is less than the predetermined amount of data, the communication interface (921) determines a parameter that identifies the time that has elapsed since the transmission request or the first datum received from the aforesaid transmission circuit, and verifies whether the time elapsed exceeds a time threshold. In the case where the time elapsed exceeds the time threshold, the communication interface (921) starts transmission (924) of the data stored in the memory.

    Abstract translation: 一种用于将传输电路(901)与互连网络(701)进行接口的通信接口(921),其中传输电路(901)通过传输请求发送预定量的数据。 特别地,通信接口(921)从发送电路(901)接收数据段,将数据段存储在存储器(922)中,并且验证存储器(922)是否包含预定量的数据。 在存储器(922)包含预定量的数据的情况下,通信接口(921)开始发送存储在存储器(922)中的数据(924)。 相反,在存储器(922)包含小于预定数据量的数据量的情况下,通信接口(921)确定标识从发送请求或第一基准开始经过的时间的参数 从上述发送电路接收,并且验证所经过的时间是否超过时间阈值。 在经过时间超过时间阈值的情况下,通信接口(921)开始存储在存储器中的数据的发送(924)。

    METHOD AND DEVICE FOR CLOCK CALIBRATION, CORRESPONDING APPARATUS

    公开(公告)号:EP3059865B1

    公开(公告)日:2018-10-31

    申请号:EP15195224.9

    申请日:2015-11-18

    CPC classification number: G06F1/12 G06F1/14 G06F1/3243 H03L1/00 Y02D10/152

    Abstract: A clock generator in apparatus such as e.g. a microcontroller unit is calibrated by aligning at subsequent calibration times the frequency of a first clock (106) with respect to the frequency of a second clock (108) having a higher frequency accuracy than said first clock (106), with the frequency of the first clock (106) which h varies between subsequent calibration times. The frequency of the first clock (106) is aligned to a frequency which is offset by a certain amount with respect to the frequency of the second clock (108) in order counter frequency error which may accumulate over time due to the variation in the frequency of the first clock (106).

    A METHOD OF INTERFACING A LC SENSOR, RELATED SYSTEM AND COMPUTER PROGRAM PRODUCT
    3.
    发明授权
    A METHOD OF INTERFACING A LC SENSOR, RELATED SYSTEM AND COMPUTER PROGRAM PRODUCT 有权
    一种接触LC传感器,相关系统和计算机程序产品的方法

    公开(公告)号:EP2966410B1

    公开(公告)日:2017-11-29

    申请号:EP15175313.4

    申请日:2015-07-03

    Abstract: A method of interfacing a LC sensor (10) with a control unit (20) is described. Specifically, the control unit comprises a first (202) and a second (204) contact, wherein the LC sensor (10) is connected between the first (202) and the second (204) contact, and wherein a capacitor (C1) is connected between the first contact (202) and a ground (GND). In particular, in order to start the oscillation of the LC sensor, the method comprising the steps of: - during a first phase, connecting the first contact (202) to a supply voltage (VDD) and placing the second contact (204) in a high impedance state, such that the capacitor (C1) is charged through the supply voltage (VDD); - during a second phase (2004), placing the first contact (202) in a high impedance state and connecting the second contact (204) to the ground (GND), such that the capacitor (C1) transfers charge towards the LC sensor (10); and - during a third phase (2006), placing the first contact (202) and the second contact (204) in a high impedance state, such that the LC sensor (10) is able to oscillate.

    A SELF-SYNCHRONIZING INTERFACE, CORRESPONDING DEVICE AND METHOD

    公开(公告)号:EP3098720B1

    公开(公告)日:2018-07-04

    申请号:EP15202773.6

    申请日:2015-12-28

    CPC classification number: G06F13/4282 G06F13/4027 G06F13/4291

    Abstract: A serial protocol interface in a communication device (MD) exchanging data (MOSI, MISO) over a communication link (121, 122, 123) is operated by: - sending output data (MOSI) on (122) the communication link, and - receiving input data (MISO) on (121) the communication link, these input data (MISO) being synchronous with a clock signal (SCK, SCLK) generated at the communication device (MD) and propagated (123) over the communication link (121, 122, 123), - initializing operation by exchanging data over the communication link (121, 122, 123) by sending output data (MOSI) on the communication link (122) at a first data rate, - detecting a signal transition in the input data (MISO) received on the communication link (121), and - once such a transition is detected, exchanging data over the communication link (121, 122, 123) at a second data rate, higher than the first data, with the exchanging of data at a second data rate synchronized (18) as a function of said signal transition.

    A METHOD OF INTERFACING A LC SENSOR, RELATED SYSTEM AND COMPUTER PROGRAM PRODUCT
    5.
    发明公开
    A METHOD OF INTERFACING A LC SENSOR, RELATED SYSTEM AND COMPUTER PROGRAM PRODUCT 有权
    VERFAHREN ZUR KOPPELUNG EINES LC-SENSORS,ENTSPRECHENDES SYSTEM UND COMPUTERPROGRAMMPRODUKT

    公开(公告)号:EP2966411A1

    公开(公告)日:2016-01-13

    申请号:EP15175293.8

    申请日:2015-07-03

    CPC classification number: G01R15/16 G01D3/032 G01R15/18

    Abstract: A method of interfacing a LC sensor (10) with a control unit (280) is described. Specifically, the control unit (280) comprises a first (202) and a second (204) contact, and the LC sensor (10) is connected between the first (202) and the second (204) contact.
    In particular, the method comprising:
    - starting the oscillation of the LC sensor (10);
    - monitoring the voltage (V 204 ) at the second contact (204), wherein the voltage (V 204 ) at the second contact (204) corresponds to the sum of the voltage (V MID ) at the first contact (202) and the voltage at the LC sensor (10); and
    - varying the voltage (V MID ) at the first contact (202) such that the voltage (V 204 ) at the second contact (204) does not exceed an upper voltage threshold and does not fall below a lower voltage threshold.

    Abstract translation: 描述了将LC传感器(10)与控制单元(280)接口的方法。 具体地,控制单元(280)包括第一(202)和第二(204)接触件,并且LC传感器(10)连接在第一(202)和第二(204)接触件之间。 特别地,该方法包括: - 开始LC传感器(10)的振荡; - 监测第二触点(204)处的电压(V 204),其中第二触点(204)处的电压(V 204)对应于第一触点(202)处的电压(V MID)和 LC传感器(10)的电压; 以及 - 改变所述第一触点(202)处的电压(V MID),使得所述第二触点(204)处的电压(V 204)不超过上限电压阈值且不低于低电压阈值。

    METHOD OF MANAGING MEMORIES, CORRESPONDING DEVICE AND APPARATUS
    7.
    发明公开
    METHOD OF MANAGING MEMORIES, CORRESPONDING DEVICE AND APPARATUS 审中-公开
    的管理方法辐条,相关设备和设置

    公开(公告)号:EP3139275A1

    公开(公告)日:2017-03-08

    申请号:EP16162366.5

    申请日:2016-03-24

    CPC classification number: G06F11/1068 G06F11/1044 G11C29/52

    Abstract: In an embodiment, a method of managing memories (10) includes:
    - providing a first (11) memory module and a second memory module (12) each including a first (R1, R2) and a second (R4, R3) partition,
    - writing first data (DATA1) in the first partition (R1) of the first memory module (11) and second data (DATA2) in the first partition (R2) of the second memory module (12), and
    - selectively operating the first (11) and second (12) memory modules in a first operating mode or a second operating mode, where:
    - in the first operating mode, parity bits (PAR1) for the first data (DATA1) are written in the second partition (R3) of the second memory module (12) and parity bits (PAR2) for the second data (DATA2) are written in the second partition (R4) of the first memory module (11),
    - in the second operating mode, further data (ED1, ED2) are written in the place of parity bits (PAR1, PAR2) in the second partition (R4, R3) of one or both the first memory module (11) and the second memory module (12).

    Abstract translation: 在实施例中,管理存储器(10)的方法包括: - 提供第一(11)存储器模块和第二存储器模块(12)每个都包括第一(R1,R2)和第二(R4,R3)的分区, - 在所述第一分区中的第一存储器模块的(R 1)(11)和在所述第一分区中的第二存储器模块的(R 2)(12)的第二数据(DATA2)写入第一数据(DATA1),以及 - 选择性地操作所述第一 (11)和第二在第一操作模式或第二操作模式,其中,(12)的存储器模块: - 在第一操作模式中,对于第一数据的奇偶校验位(PAR1)(DATA1)被写入到第二分区(R3 )所述第二存储器模块(12)和用于所述第二数据的奇偶校验位(PAR2)(DATA2)的被写入到第二分区中的第一存储器模块的(R4)(11) - (在第二操作模式中,进一步的数据 ED1,ED2)被写入在一个或两个所述第一存储器模块(11的在第二分区中的奇偶校验位(PAR1,PAR2)(R4,R3))和所述第二存储器模块的地方 (12)。

    A SYSTEM FOR INTERFACING AN LC SENSOR, RELATED METHOD AND COMPUTER PROGRAM PRODUCT
    8.
    发明公开
    A SYSTEM FOR INTERFACING AN LC SENSOR, RELATED METHOD AND COMPUTER PROGRAM PRODUCT 审中-公开
    系统ZUR SCHNITTSTELLENBILDUNG AN EINEM LC传感器,ZUGEHÖRIGESVERFAHREN UND COMPUTERPROGRAMMPRODUKT

    公开(公告)号:EP3021488A1

    公开(公告)日:2016-05-18

    申请号:EP15185616.8

    申请日:2015-09-17

    Abstract: A system for interfacing an LC sensor (10) is described. The system comprises means (206) configured to selectively start an oscillation of the LC sensor (10).
    The system comprises also an analog peak detector (280) configured to determine a signal ( V peak ) being indicative of a peak voltage of the oscillation of the LC sensor (10) and detection means (208, 230) configured to determine the state of the LC sensor (10) as a function of the signal ( V peak ) determined by the analog peak detector (280).

    Abstract translation: 描述了用于接口LC传感器(10)的系统。 系统包括被配置为选择性地启动LC传感器(10)的振荡的装置(206)。 该系统还包括模拟峰值检测器(280),其被配置为确定指示LC传感器(10)的振荡的峰值电压的信号(V峰值)和检测装置(208,230),其被配置为确定 LC传感器(10)作为由模拟峰值检测器(280)确定的信号(V峰值)的函数。

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