公开(公告)号：WO2014191966A1

公开(公告)日：2014-12-04

申请号：PCT/IB2014/061839

申请日：2014-05-30

Applicant: STMICROELECTRONICS S.R.L.

Inventor： MANGANO, Daniele ,  DONDINI, Mirko ,  PISASALE, Salvatore

IPC: G06F13/40

CPC classification number: G06F13/28 ,  G06F3/0619 ,  G06F3/0655 ,  G06F3/067 ,  G06F13/4059 ,  G06F2213/0038

Abstract: A communication interface (921) for interfacing a transmission circuit (901) with an interconnection network (701), wherein the transmission circuit (901) requests via a transmission request transmission of a predetermined amount of data. In particular, the communication interface (921) receives data segments from the transmission circuit (901), stores the data segments in a memory (922), and verifies whether the memory (922) contains the predetermined amount of data. In the case where the memory (922) contains the predetermined amount of data, the communication interface (921) starts transmission (924) of the data stored in the memory (922). Instead, in the case where the memory (922) contains an amount of data that is less than the predetermined amount of data, the communication interface (921) determines a parameter that identifies the time that has elapsed since the transmission request or the first datum received from the aforesaid transmission circuit, and verifies whether the time elapsed exceeds a time threshold. In the case where the time elapsed exceeds the time threshold, the communication interface (921) starts transmission (924) of the data stored in the memory.

Abstract translation: 一种用于将传输电路（901）与互连网络（701）进行接口的通信接口（921），其中传输电路（901）通过传输请求发送预定量的数据。 特别地，通信接口（921）从发送电路（901）接收数据段，将数据段存储在存储器（922）中，并且验证存储器（922）是否包含预定量的数据。 在存储器（922）包含预定量的数据的情况下，通信接口（921）开始发送存储在存储器（922）中的数据（924）。 相反，在存储器（922）包含小于预定数据量的数据量的情况下，通信接口（921）确定标识从发送请求或第一基准开始经过的时间的参数 从上述发送电路接收，并且验证所经过的时间是否超过时间阈值。 在经过时间超过时间阈值的情况下，通信接口（921）开始存储在存储器中的数据的发送（924）。

公开(公告)号：EP4109286A1

公开(公告)日：2022-12-28

申请号：EP22178614.8

申请日：2022-06-13

Applicant: STMicroelectronics S.r.l.

Inventor： MONDELLO, Antonino ,  PISASALE, Salvatore

IPC: G06F15/173 ,  G06F13/14

Abstract: According to an aspect, it is proposed a system on chip comprising:
- at least one master device (Mj, My),
- at least one slave device (Sk),
- a connection interface (BM) configured to route signals between said at least one master device (Mj, My) and said at least one slave device (Sk), the connection interface being configured to operate according to configuration parameters,
- a configuration bus (CFB) connected to the connection interface (BM), the configuration bus (CFB) being configured to deliver new configuration parameters to the connection interface so as to adapt the operation of the connection interface.