Test mode circuitry for a programmable tamper detection circuit
    2.
    发明公开
    Test mode circuitry for a programmable tamper detection circuit 有权
    用于可编程篡改检测电路的测试模式电路

    公开(公告)号:EP1788580A1

    公开(公告)日:2007-05-23

    申请号:EP06255930.7

    申请日:2006-11-21

    CPC classification number: G11C16/20 G11C16/22 G11C17/16

    Abstract: An integrated circuit includes an output pad, an alarm output pad, and a test mode output pad. A first multi-bit register is programmable to store programmable data such as data that identifies a customer for whom the integrated circuit has been manufactured. A second multi-bit register is programmable to store customer specified threshold data. A first circuit selectively couples the first and second multi-bit registers to the output pad. The first circuit is operable responsive to the integrated circuit being placed into a test mode to perform parallel-to-serial conversion of either the customer identification data stored in the first multi-bit register or the customer specified threshold data stored in the second multi-bit register and drive the converted data for output through the output pad. The integrated circuit further includes a tamper detection circuit operable responsive to the customer specified threshold data to generate a tamper alarm signal. A second circuit selectively couples the tamper alarm signal to the alarm output pad and test mode output pad depending on whether the integrated circuit is in a test mode. More specifically, the second circuit operates to drive the alarm output pad with the tamper alarm signal when the integrated circuit is not in test mode and drive the test mode output pad with the tamper alarm signal when the integrated circuit is in test mode (with the alarm output pad driven to a known state).

    Abstract translation: 集成电路包括输出焊盘,警报输出焊盘和测试模式输出焊盘。 第一多位寄存器是可编程的以存储可编程数据,例如标识已为其制造集成电路的客户的数据。 第二个多位寄存器可编程以存储客户指定的阈值数据。 第一电路选择性地将第一和第二多位寄存器耦合到输出焊盘。 所述第一电路可响应于所述集成电路被置于测试模式而操作以执行存储在所述第一多位寄存器中的所述客户标识数据或存储在所述第二多位寄存器中的所述客户指定阈值数据的并行到串行转换, bit寄存器并驱动转换后的数据通过输出端输出。 集成电路进一步包括篡改检测电路,其可响应于顾客指定的阈值数据而产生篡改警报信号。 取决于集成电路是否处于测试模式,第二电路选择性地将篡改警报信号耦合到警报输出焊盘和测试模式输出焊盘。 更具体地,当集成电路不处于测试模式时,第二电路操作以用篡改警报信号驱动警报输出垫,并且当集成电路处于测试模式时用第二电路驱动具有篡改警报信号的测试模式输出垫(具有 警报输出板驱动到已知状态)。

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