公开(公告)号：EP1742229A3

公开(公告)日：2008-05-21

申请号：EP06115639.4

申请日：2006-06-19

Applicant: STMicroelectronics Pvt. Ltd

Inventor： Dubey, Prashant ,  Kashyap, Amit

IPC: G11C29/00

CPC classification number: G11C29/802 ,  G11C29/4401 ,  G11C29/812

Abstract: The present invention provides a built-in self-repairable memory. The invention repairs the faulty IC through hard fuses, as well as through available redundancy in memories on chip. As the faults are not present in all the memories, the invention uses lesser number of fuses to actually make a perfect repair and thus result into a yield enhancement. The fuse data is stored in a compressed form and then decompressed at the power on. The fuse data interface with the memory to be repaired is serial. The serial links decreases the routing congestion and hence gain in area as well as gain in yield (due to lesser defects and reduced area).

公开(公告)号：EP1791133A1

公开(公告)日：2007-05-30

申请号：EP06124410.9

申请日：2006-11-20

Applicant: STMicroelectronics Pvt. Ltd.

Inventor： Kashyap, Amit ,  Dubey, Prashant ,  Garg, Akhil

IPC: G11C29/48 ,  G11C29/14

CPC classification number: G11C29/48 ,  G11C29/14

Abstract: The present invention relates to a method of sharing testing components for multiple embedded memories and the memory system incorporating the same.
The memory system includes multiple test controllers, multiple interface devices, a main controller, and a serial interface. The main controller is used for initializing testing of each of the dissimilar memory groups using a serial interface and local test controllers. The memory system results in reduced routing congestion and faster testing of plurality of dissimilar memories.

Abstract translation: 本发明涉及到的共享检测部件针对多个嵌入式存储器和存储器系统结合的方法。 该存储器系统包括多个测试控制器，在多个接口设备，主控制器和串行接口。 主控制器用于初始化每个使用串行接口和本地测试控制器异种存储器组的测试。 存储系统能减少布线拥塞和不同的记忆多个测试速度更快。

公开(公告)号：EP1742229A2

公开(公告)日：2007-01-10

申请号：EP06115639.4

申请日：2006-06-19

Applicant: STMicroelectronics Pvt. Ltd

Inventor： Dubey, Prashant ,  Kashyap, Amit

IPC: G11C29/00

CPC classification number: G11C29/802 ,  G11C29/4401 ,  G11C29/812

Abstract: The present invention provides a built-in self-repairable memory. The invention repairs the faulty IC through hard fuses, as well as through available redundancy in memories on chip. As the faults are not present in all the memories, the invention uses lesser number of fuses to actually make a perfect repair and thus result into a yield enhancement. The fuse data is stored in a compressed form and then decompressed at the power on. The fuse data interface with the memory to be repaired is serial. The serial links decreases the routing congestion and hence gain in area as well as gain in yield (due to lesser defects and reduced area).

Abstract translation: 本发明提供了一种内置的可自修复存储器。 本发明通过硬熔丝以及通过片上存储器中的可用冗余来修复故障IC。 由于故障不存在于所有存储器中，因此本发明使用较少数量的保险丝来实际进行完美的修理并因此导致产量提高。 保险丝数据以压缩格式存储，然后在通电时解压缩。 与要修复的存储器的熔丝数据接口是串行的。 串行链路减少了路由拥塞，从而减少了面积以及增加收益（由于更少的缺陷和更小的面积）。