Logarithmic linear variable gain CMOS amplifier
    1.
    发明公开
    Logarithmic linear variable gain CMOS amplifier 有权
    对数算符线性CMOS-Verstärkermit variablerVerstärkung

    公开(公告)号:EP1513252A1

    公开(公告)日:2005-03-09

    申请号:EP03425568.7

    申请日:2003-09-02

    CPC classification number: H03G7/06 H03G7/001

    Abstract: In a logarithmic linear variable gain CMOS amplifier comprising a differential input pair of transistors with diode-connected load transistors, a second differential pair of transistors sharing the same diode-connected load transistors, a pair of current mirrors for programmably injecting respective bias currents in the common source modes of said two differential pairs of transistors, generated by a digital-to-analog converter, the groups delay is rendered independent from the gain and linearity inversely proportional to the gain by cross connnecting the control nodes of the second differential pair to the control nodes of the first differential input pair of transistors and by biasing the two differential pair of transistors such that the sum of their respecive bias current is maintained constant.
    Preferably, transistor means connected in parallel to each of said diode-connected load transitors are added for subtracting a constant amount of current from said sum current that would otherwise be flowing through the diode-connected load transistors.

    Abstract translation: 在包括具有二极管连接的负载晶体管的差分输入对晶体管的对数线性可变增益CMOS放大器中,共享相同二极管连接的负载晶体管的第二差分对晶体管,一对电流镜,用于可编程地将相应的偏置电流注入到 由数模转换器产生的所述两个差分对晶体管的共模源,通过将第二差分对的控制节点与第二差分对的交叉连接相互连接,使组延迟独立于与增益成反比的增益和线性度 控制第一差分输入对晶体管的节点,并通过偏置两个差分对的晶体管,使得它们相应的偏置电流之和保持恒定。 添加并联连接到每个所述二极管连接的负载转换器的晶体管装置,用于从否则将流过二极管连接的负载晶体管的所述和电流中减去恒定量的电流。

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