Abstract:
A circuit for reading a semiconductor memory device comprises at least one global circuit (1) for generating a global reference signal (RIFN) for a respective plurality of cell-reading circuits (SA1-SAn) disposed locally in the memory device. The circuit comprises at least one circuit (51-5an) for replicating the reference signal (RIFN) locally in order to generate a local reference signal (MAT11-MAT1n) to be supplied to at least one respective cell-reading circuit (SA1-SAn).