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1.发明授权Process for forming an edge structure to seal integrated electronic devices, and corresponding device 失效一种用于边缘结构的集成电子器件的制备过程中被密封，并且相对应的设备
公开(公告)号：EP0856886B1
公开(公告)日：2003-06-25
申请号：EP97830029.1
申请日：1997-01-31
Applicant: STMicroelectronics S.r.l.
Inventor： Calegari, Camilla , Carrara, Anna , Fratin, Lorenzo , Riva, Carlo
IPC: H01L23/00 , H01L23/532
CPC classification number: H01L23/564 , H01L23/3171 , H01L23/5329 , H01L2924/0002 , Y10S438/958 , H01L2924/00
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