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    Variable gain amplifier
    3.
    发明公开
    Variable gain amplifier 审中-公开
    可变增益放大器

    公开(公告)号：EP1231712A3

    公开(公告)日：2004-04-28

    申请号：EP02075529.4

    申请日：2002-02-07

    Applicant: STMicroelectronics S.r.l.

    Inventor： Filoramo, Pietro ,  Chiarillo, Tiziano

    IPC: H03G7/08

    CPC classification number: H03G7/08

    Abstract: A variable gain amplifier is described which comprises a first device to which a first control signal (Vc, Vcl) is applied so that the gain (Ail, Ai) of an output signal (iout, io) of the first device (11, 22, Q45-Q48) with respect to a first input signal (in, il, ir) is a function of the exponential type of the first control signal (Vc, Vcl). The amplifier comprises a feedback network (25, Q51-Q58) connected between an output terminal and an input terminal of the first device (22, Q45-Q48) so as to assure that the gain (Ai) in decibel of the first device (22, Q45-Q48) is a linear function of the first control signal (Vcl).

    Abstract translation: 描述了一种可变增益放大器，其包括施加有第一控制信号（Vc，Vc1）的第一设备，使得第一设备（11,22）的输出信号（iout，io）的增益（Ail，Ai） ，Q45-Q48）相对于第一输入信号（in，il，ir）是第一控制信号（Vc，Vcl）的指数型的函数。 该放大器包括连接在第一设备（22，Q45-Q48）的输出端和输入端之间的反馈网络（25，Q51-Q58），以确保第一设备的分贝增益（Ai） 22，Q45-Q48）是第一控制信号（Vcl）的线性函数。

    Mixer with exponentially variable gain
    4.
    发明公开
    Mixer with exponentially variable gain 有权
    Mischer mit exponentiell variablerVerstärkung

    公开(公告)号：EP1337035A1

    公开(公告)日：2003-08-20

    申请号：EP02425035.9

    申请日：2002-01-29

    Applicant: STMicroelectronics S.r.l.

    Inventor： Filoramo, Pietro ,  Granata, Angelo

    IPC: H03D7/14 ,  H03G1/00

    CPC classification number: H03G1/0023 ,  H03D7/1433 ,  H03D7/1458 ,  H03D7/1491 ,  H03D2200/0025 ,  H03D2200/0043

    Abstract: An exponentially variable gain mixer comprises a variable gain mixer receiving an input differential signal to be amplified and producing an amplified differential output signal in function of a differential modulation signal and of a control voltage, at least an oscillating circuit generating an alternated differential signal, a correction circuit input with an external gain variation command and with the alternated differential signal for producing the differential modulation signal and the control voltage.
    Differently from comparable known circuits, the modulator does not require a peak detector because the correction circuit comprises a first amplifier input with the external gain variation command that generates the control voltage and a bias voltage as differential output signal, and a second differential amplifier referred to the bias voltage, input with the alternated differential signal that outputs the differential modulation signal.

    Abstract translation: 指数可变增益混频器包括可变增益混频器，其接收待放大的输入差分信号，并且产生具有差分调制信号和控制电压的放大差分输出信号，至少产生交替差分信号的振荡电路， 具有外部增益变化指令的校正电路输入和用于产生差分调制信号和控制电压的交替差分信号。 与可比较的已知电路不同，调制器不需要峰值检测器，因为校正电路包括具有产生控制电压的外部增益变化指令和作为差分输出信号的偏置电压的第一放大器输入和第二差分放大器 偏置电压，输入与输出差分调制信号的交替差分信号。

    Transistor amplifying stage
    7.
    发明公开
    Transistor amplifying stage 审中-公开
    Transistorverstärkerstufe

    公开(公告)号：EP1601100A1

    公开(公告)日：2005-11-30

    申请号：EP04425383.9

    申请日：2004-05-27

    Applicant: STMicroelectronics S.r.l.

    Inventor： Filoramo, Pietro ,  Cavallaro, Alberto Giuseppe

    IPC: H03F3/45

    CPC classification number: H03F3/45237 ,  H03F3/45708

    Abstract: Herein described is an amplifying stage comprising a first circuit part (1) and a second circuit part (2). The first circuit part (1) is positioned between a first (Vdd) and a second reference voltage and comprises at least a first transistor (Ma1....Man) having a first non-drivable terminal connected with current supplying means (Ibias) and at least a second transistor (Mt1) having a first non-drivable terminal connected with a second non-drivable terminal of the at least a first transistor (Ma1....Man); the current supplying means (Ibias) are connected to said first reference voltage (Vdd). The second circuit part (2) is connected by circuit to the first circuit part (1) and is fed by a current (It2) proportional to the current supplied by the current supplying means (Ibias). The second circuit part (2) has at least one input terminal and is connected to a load (LOAD). The first circuit part (1) comprises means (3) for connecting said first non-drivable terminal of the at least a first transistor (Ma1....Man) with the drivable terminal of the at least a second transistor (Mt1) and said connection means (3) are suitable for imposing the current that passes through said at least a second transistor (Mt1) to be the same as current (Ibias) supplied by said current supplying means and the voltage (Vp) between said first non-drivable terminal of the at least a first transistor (Ma1....Man) and ground is greater than the saturation voltage (Vds-sat) between the non-drivable terminals of said at least a first transistor (Ma1....Man). At the drivable terminal of the at least a first transistor (Ma1....Man) and at the at least one input terminal of the second circuit part (2) the same at least one input signal (Vin1....Vinn).

    Abstract translation: 这里描述的是包括第一电路部分（1）和第二电路部分（2）的放大级。 第一电路部分（1）位于第一（Vdd）和第二参考电压之间，并且至少包括具有与电流供应装置（Ibias）连接的第一不可驱动端子的第一晶体管（Ma1 ... Man） 以及至少第二晶体管（Mt1），具有与所述至少第一晶体管（Ma1 ... Man）的第二不可驱动端子连接的第一不可驱动端子。 电流供给装置（Ibias）连接到所述第一参考电压（Vdd）。 第二电路部分（2）通过电路连接到第一电路部分（1），并由与电流供应装置（Ibias）提供的电流成比例的电流（It2）馈送。 第二电路部分（2）具有至少一个输入端子并连接到负载（LOAD）。 第一电路部分（1）包括用于将至少第一晶体管（Ma1 ... Man）的所述第一不可驱动端子与至少第二晶体管（Mt1）的可驱动端子连接的装置（3）和 所述连接装置（3）适于将通过所述至少第二晶体管（Mt1）的电流施加到与所述电流供应装置提供的电流（Ibias）相同的电流和所述第一非易失性存储器之间的电压（Vp） 所述至少第一晶体管（Ma1 ... Man）和地的可驱动端子大于所述至少第一晶体管（Ma1 .... Man）的不可驱动端子之间的饱和电压（Vds-sat） ）。 在至少第一晶体管（Ma1 ... Man）的可驱动端子处和在第二电路部分（2）的至少一个输入端子处，相同的至少一个输入信号（Vin1 ... Vinn） 。

    Method of limiting the noise bandwidth of a bandgap voltage generator and relative bandgap voltage generator
    8.
    发明公开
    Method of limiting the noise bandwidth of a bandgap voltage generator and relative bandgap voltage generator 有权
    Verfahren zum Begrenzen derGeräuschbandbreiteeines Bandgapspannungsgenerators and relativer Bandgapspannungsgenerator

    公开(公告)号：EP1542111A1

    公开(公告)日：2005-06-15

    申请号：EP03425791.5

    申请日：2003-12-10

    Applicant: STMicroelectronics S.r.l.

    Inventor： Cali', Giovanni ,  Filoramo, Pietro

    IPC: G05F3/26 ,  G05F3/30

    CPC classification number: G05F3/30

    Abstract: A method of limiting the noise bandwidth of a closed loop bandgap voltage generator generating a stable voltage reference on an output node, comprising a current mirror coupled between the output node and ground, a feedback line including a conducting feedback transistor coupled to an output branch of the current mirror, cooperating with a biasing transistor of the current mirror for keeping constant the collector or drain voltage of the output transistor of the current mirror, and dimensioned such to have the same base-emitter or gate-source voltage of the diode-connected input transistor of the current mirror, a current generator for biasing the feedback transistor by injecting a current into a bias node of the feedback line, and a noise filtering capacitor connected between the bias node and ground, substantially consists in forcing a certain current through the feedback transistor and increasing the resistance of the portion of feedback line in parallel to the capacitor.
    This method is implemented in a bandgap voltage generator the feedback line of which comprises circuit means connected between the bias node and the feedback transistor for contributing to force a certain current through the feedback transistor and increasing the resistance of the portion of feedback line in parallel to the capacitor.

    Abstract translation: 一种限制闭环带隙电压发生器的噪声带宽的方法，所述闭环带隙电压发生器在输出节点上产生稳定的电压基准，包括耦合在所述输出节点和地之间的电流镜，反馈线包括耦合到输出节点的输出分支的导电反馈晶体管 电流镜，与电流镜的偏置晶体管配合，以保持电流镜的输出晶体管的集电极或漏极电压恒定，并且尺寸使其具有与二极管连接的相同的基极 - 发射极或栅源电压 电流镜的输入晶体管，用于通过将电流注入到反馈线的偏置节点中而偏置反馈晶体管的电流发生器，以及连接在偏置节点和地之间的噪声滤波电容器，其基本上在于迫使一定电流通过 反馈晶体管并且增加反馈线的部分与电容器并联的电阻。 该方法在带隙电压发生器中实现，其反馈线包括连接在偏置节点和反馈晶体管之间的电路装置，用于有助于强制通过反馈晶体管的一定电流并增加反馈部分的电阻 线路与电容器并联。

    Method and corresponding circuit structure to correlate the transconductance of transistors of different type
    9.
    发明公开
    Method and corresponding circuit structure to correlate the transconductance of transistors of different type 有权
    为不同类型的晶体管的跨导相关联的方法，和相应的电路

    公开(公告)号：EP1494351A1

    公开(公告)日：2005-01-05

    申请号：EP03425430.0

    申请日：2003-06-30

    Applicant: STMicroelectronics S.r.l.

    Inventor： Filoramo, Pietro ,  Cali, Giovanni

    IPC: H03F3/45 ,  H03F1/32

    CPC classification number: H03F3/4578 ,  H03F1/3211 ,  H03F3/45282 ,  H03F2203/45244 ,  H03F2203/45466

    Abstract: The invention relates to a method and related circuit structure (10) to correlate the transconductance value of transistors of different type, for example MOS transistors and bipolar transistors. The structure (10) comprises a first differential cell (3) formed by transistors (T1a, T1b) of the first type and a second differential cell (4) formed by transistors (T2a, T2b) of the second type connected to each other by means of a circuit portion (6) responsible for calculating an error signal (Δε) obtained as difference between the cell differential currents and applied to said first differential cell (3) and to an output node (O) of the same circuit structure (10) obtaining a transconductance correlation independent from process tolerances and temperature.

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