公开(公告)号：EP1732229A1

公开(公告)日：2006-12-13

申请号：EP05425416.4

申请日：2005-06-09

Applicant: STMicroelectronics S.r.l.

Inventor： Pernici, Sergio ,  Garibaldi, Federico

IPC: H03M3/04

CPC classification number: H03M3/454 ,  H03M3/424

Abstract: A single-loop differential switched-capacitors Sigma-Delta converter has a three stage double-sampling architecture, a reduced current consumption and is stable even for large input dynamics. The latter characteristic makes it suitable for RF applications.
The novel three-stage multi-bit double-sampled architecture of a Sigma-Delta converter has a single-loop architecture, that is all integrators are included in a same feedback loop. This has been made possible by an effective choice of the type of integrators of the converter connected in cascade.
Thanks to its innovative architecture, the functioning of the converter is less sensitive to non idealities of the operational amplifiers of the integrators.

Abstract translation: 单回路差分开关电容器Σ-Δ转换器具有三级双采样架构，降低了电流消耗，并且即使对于大输入动态也是稳定的。 后者的特点使其适用于射频应用。 Sigma-Delta转换器的新型三级多位双采样架构具有单回路架构，即所有积分器都包含在相同的反馈环路中。 这是通过有效选择级联连接器的积分器的类型来实现的。 由于其创新的架构，转换器的功能对集成商的运算放大器的非理想性较不敏感。

公开(公告)号：EP1564886A1

公开(公告)日：2005-08-17

申请号：EP04425083.5

申请日：2004-02-10

Applicant: STMicroelectronics S.r.l.

Inventor： Confalonieri, Pierangelo ,  Zamprogno, Marco ,  Garibaldi, Federico

IPC: H03K5/13 ,  H03K5/08

CPC classification number: H03K5/08 ,  H03K5/13

Abstract: The described circuit comprises a first stage with an inverter (INV1), a capacitor (C1) connected to the input terminal of the inverter, a constant current generator (G1) and an electronic switch (M1) controlled by an input pulse (IN). The capacitor (C1) begins to charge at a predetermined edge of the input pulse and brings the input terminal of the inverter (INV1) from a first voltage (ground) to the switching threshold voltage of the inverter, so that on the output terminal of the inverter there is obtained a pulse having an edge that, as referred to the predetermined edge of the input pulse, has a delay time that depends on the inverter threshold. With a view to obtaining a delay time substantially independent of the inverter threshold, the circuit comprises a second stage, coupled with the first, that is a dual circuit of the circuit of the first stage and has an inverter (INV2) equal to the one of the first stage. The delay time of the circuit is given by the sum of the time needed to charge the capacitor (C1) of the first stage from ground to the threshold voltage and the time needed to discharge the capacitor (C2) of the second stage from the supply voltage (VDD) to the threshold voltage. This sum is independent of the threshold values of the inverters.

Abstract translation: 所描述的电路包括具有逆变器（INV1）的第一级，连接到逆变器的输入端的电容器（C1），恒定电流发生器（G1）和由输入脉冲（IN）控制的电子开关（M1） 。 电容器（C1）开始在输入脉冲的预定边缘充电，使逆变器（INV1）的输入端从第一电压（接地）转换到逆变器的开关阈值电压，使得在输出端 逆变器获得具有如参照输入脉冲的预定边缘具有取决于逆变器阈值的延迟时间的边缘的脉冲。 为了获得基本上与逆变器阈值相当的延迟时间，电路包括与第一级耦合的第二级，即第一级的电路的双电路，并且具有等于第一级的反相器（INV2） 的第一阶段 电路的延迟时间由第一级的接地电容器（C1）向阈值电压充电所需的时间和从供电电路的第二级电容器（C2）放电所需的时间之和给出 电压（VDD）达到阈值电压。 该和与反相器的阈值无关。

公开(公告)号：EP1732229B1

公开(公告)日：2009-10-21

申请号：EP05425416.4

申请日：2005-06-09

Applicant: STMicroelectronics S.r.l.

Inventor： Pernici, Sergio ,  Garibaldi, Federico

IPC: H03M3/04

CPC classification number: H03M3/454 ,  H03M3/424