公开(公告)号：EP2312632A1

公开(公告)日：2011-04-20

申请号：EP10176594.9

申请日：2010-09-14

Applicant: STMicroelectronics S.r.l.

Inventor： Confalonieri, Pierangelo ,  Guanziroli, Federico ,  Zamprogno, Marco

IPC: H01L27/092 ,  H03K17/0412 ,  H03K17/687 ,  G05F1/46 ,  H03M1/08 ,  H03M1/12 ,  H03M1/66

CPC classification number: H03K17/162 ,  H03M1/0845 ,  H03M1/12 ,  H03M1/66 ,  Y10T307/50

Abstract: The control terminal of an analogue switch is driven by the analogue references when no transitions of the state of the switch are occurring in order to avoid switching noise of the digital circuitry to be transferred to the output of the switch, and by the digital references when transitions of the state of the switch are occurring in order to avoid distorsions on the analogue circuitry.

Abstract translation: 模拟开关的控制端子在不发生开关状态的转换时由模拟基准电压驱动，以避免将数字电路的开关噪声转换到开关的输出端，并通过数字参考电压 正在发生开关状态的转换，以避免模拟电路的变形。

公开(公告)号：EP2302791A1

公开(公告)日：2011-03-30

申请号：EP10181300.4

申请日：2010-09-28

Applicant: STMicroelectronics S.r.l.

Inventor： Confalonieri Pierangelo ,  Guanziroli, Federico ,  Nicollini, Germano

IPC: H03H1/02 ,  H03H7/12 ,  H03H11/12

CPC classification number: H03H5/12

Abstract: The present invention relates to an electronic regulation device (100) of a variable capacitance of an integrated circuit having a time parameter depending on said variable capacitance. The regulation device comprises a regulation loop (105), and is configured to generate in output a plurality of binary regulation signals (B0, B1, B2, B3).
Such regulation device comprises a block (102) of switching capacitors that comprises a first array (112; 116) of capacitors that can be activated/deactivated based on the binary regulation signals (B0, B1, B2, B3) to be selectively connected in parallel therebetween. Such first array includes capacitors having respective binarily increasing capacitances starting from a first minimum capacitive value (1CB; 1CD). The block (102) is characterized in that it further comprises at least one second array (111; 113, 114, 115) of switching capacitors that can be activated/deactivated based on the binary regulation signals (B0, B1, B2, B3) to be selectively connected in parallel between them and to said first array capacitors. The second array at least partially includes capacitors (Ca2, Ca3, Ca4; Ca2', Ca3') having binarily increasing capacitances starting from a second minimum capacitive value (1CA) that is different from said first minimum capacitive value (1CB).

Abstract translation: 本发明涉及在具有时间参数取决于所述可变电容的集成电路的一个可变电容的电子调节装置（100）。 调节装置包括一个调节环（105），并且被配置在输出，以产生调节二进制信号（B0，B1，B2，B3）的复数。 搜索调节装置包括开关电容器块（102）做了包括第一阵列（112; 116）的电容器也可以被激活/基于选择性地连接在二进制调节信号（B0，B1，B2，B3）去激活 并行之间那里。 搜索第一阵列包括具有电容respectivement binarily增加从第一最小电容值（1CB; 1CD）开始电容器。 块（102）的特征在于，这样做是还包括至少一个第二阵列（111; 113，114，115）的切换电容器也可以被激活/基于二进制调节信号去激活（B0，B1，B2，B3） 选择性地被连接在它们之间，并与所述电容器firstArray平行。 第二阵列至少部分地包括电容器（CA2，CA3，CA4;钙”，CA 3' ），其具有增加binarily从第二最小电容值（1CA）开始电容确实是从所述第一电容最小值（1CB）不同。

公开(公告)号：EP2088671A2

公开(公告)日：2009-08-12

申请号：EP09152115.3

申请日：2009-02-05

Applicant: STMicroelectronics S.r.l.

Inventor： Guanziroli, Federico ,  Nicollini, Germano

IPC: H03F3/217

CPC classification number: H03F3/217

Abstract: The invention relates to a device (100) comprising: an input for an electric signal (v e (t)); an integrator stage (101) connected to said input to provide an integrated signal (v int (t)); an amplifier stage (300) electrically coupled to the integrator stage (101) to receive said integrated signal (v int (t)) and to provide an output signal (v ott (t)). The device being characterized in that the integrator stage (101) is such that the integrated signal is obtained by an individual signal integration operation.

Abstract translation: 本发明涉及一种装置（100），包括：用于电信号的输入（v e（t））; 连接到所述输入的积分器级（101）以提供积分信号（v int（t））; 电耦合到积分器级（101）以接收所述积分信号（v int（t））并提供输出信号（v ott（t））的放大器级（300）。 该装置的特征在于，积分器级（101）使得通过单独的信号积分操作获得积分信号。

公开(公告)号：EP1788704A1

公开(公告)日：2007-05-23

申请号：EP05425812.4

申请日：2005-11-17

Applicant: STMicroelectronics S.r.l.

Inventor： Guanziroli, Federico ,  Nicollini, Germano ,  Confalonieri, Pierangelo

IPC: H03K4/06

CPC classification number: H03K4/066

Abstract: A generating device (100) of a triangular signal (v tri (t)) comprises an input device (101) provided with first terminals (102, 103) in order to receive a first (V A ) and second (GND) potentials and with differential output terminals (104, 105) in order to send an intermediate signal (i int (t)) to an integration device (501).
This integration device comprises differential input terminals (IN1, IN2) connected to the output terminals of the input device and first output terminals (OUT1, OUT2) in order to provide the triangular signal (V tri (t)).
The generating device is characterized in that the input device comprises switching means (T 1 , T 2 , T 3 , T 4 ) which can be activated/deactivated by means of external selection signals (S 1 , S 2 ) in order to connect the input terminals (IN1, IN2) to the first terminals of the input device according to alternative configurations. Furthermore, these external selection signals are generated in response to a timing signal (CK) having a substantially constant frequency (f ck ).

Abstract translation: 三角形信号（v tri（t））的发生装置（100）包括设置有第一端子（102,103）的输入装置（101），以便接收第一（VA）和第二（GND）电位并且与 差分输出端子（104,105），以便向集成装置（501）发送中间信号（int int（t））。 该积分装置包括连接到输入装置的输出端的差分输入端（IN1，IN2）和第一输出端（OUT1，OUT2），以提供三角形信号（V tri（t））。 该生成装置的特征在于，该输入装置包括可通过外部选择信号（S1，S2）激活/去激活的切换装置（T 1，T 2，T 3，T 4），以便连接 输入端子（IN1，IN2）根据其他配置连接到输入设备的第一个端子。 此外，这些外部选择信号是响应于具有基本恒定频率（f ck）的定时信号（CK）产生的。

公开(公告)号：EP1788701A1

公开(公告)日：2007-05-23

申请号：EP05425811.6

申请日：2005-11-17

Applicant: STMicroelectronics S.r.l.

Inventor： Guanziroli, Federico ,  Nicollini, Germano ,  Confalonieri, Pierangelo

IPC: H03F3/217

CPC classification number: H03F3/217 ,  H03F3/2173 ,  H03F2200/78

Abstract: An open-loop class-D amplifier (300) comprises a generation device (307) of a triangular wave signal (v tri (t)) having a differential output. Furthermore, the amplifier comprises at least one comparing circuit (302) provided with first differential input terminals (S+,S-) in order to receive a first signal (v in (t)) and second differential input terminals (T+,T-) in order to receive the triangular signal.
In addition, the amplifier comprises a power stage (300') in order to give an output signal (v out (t)) to a load (306) and a terminal connectable to a power supply potential (V A ).
The amplifier is characterized in that the generation device is such that the triangular signal has a peak value (V tri ) which is substantially proportional to said power supply potential (V A ) and a frequency (f fri ) which is fixed to a reference frequency value (f ck ), for the power supply potential changes.

Abstract translation: 开环D类放大器（300）包括具有差分输出的三角波信号（v tri（t））的生成装置（307）。 此外，放大器包括至少一个比较电路（302），用于接收第一信号（v in（t））和第二差分输入端子（T +，T）中的第一差分输入端子（S +，S-） 以便接收三角形信号。 此外，放大器包括功率级（300'），以便给出负载（306）的输出信号（v out（t））和可连接到电源电位（V A）的端子。 所述放大器的特征在于，所述发生装置使得所述三角形信号具有与所述电源电位（VA）基本成比例的峰值（V tri）和固定为参考频率值的频率（fb1） （f ck），供电电位变化。