Abstract:
A system, such as e.g. a multiplier, for processing digital signals by using digital signals (x) in the Canonic Signed Digit (CSD) representation includes:
an input element (10) configured for making the digital signals (x) available in the Binary Canonic Signed Digit (BCSD) representation, a converter (20) for converting the digital signals made available in the Binary Canonic Signed Digit (BCSD) representation into said Canonic Signed Digit (CSD) representation in view of use in processing.
The input element (10) may be a memory where the signals are stored in the Binary Canonic Signed Digit (BCSD) representation. Alternatively, the input element is adapted to be fed with digital signals (x) in the two's complement representation, and includes at least one converter (10) for converting the digital signals from the two's complement representation into the Binary Canonic Signed Digit (BCSD) representation. This preferably occurs via the T2I transformation, which leads to generating signals in the Canonic Signed Digit (CSD) representation, which are then converted to the Binary Canonic Signed Digit (BCSD) representation.
Abstract:
A data processor unit (180), including at least two operation-execution units (PU1,..., PUn), each operation-execution unit being adapted to: receive input data (DX1,..DXn, DY1,..Dyn, DZ1,..DZn); perform a respective operation on the input data; and outputting output data (DO1,...,DOn) resulting from said input data after applying said operation, the data processor unit further including: a data storage unit ( 220 ) including at least two individually-accessible memory devices (B1,.., Bm) adapted to store data; a programmable controller ( 205 ) adapted to be programmed so as to execute a selected program; a first data routing circuit arrangement ( 225 ) adapted to receive data from the at least two memory devices, from the programmable controller and from a second data routing circuit arrangement ( 235 ), and for selectively routing selected ones among the received data to the input of the operation-execution units; said second data routing circuit arrangement being adapted to receive the output data outputted by the operation-execution units and to selectively route the output data to the at least two memory devices, to the programmable controller, and to the first data routing circuit arrangement; wherein the programmable controller is operatively coupled to the at least two operation-execution units, to the first and second data routing circuit arrangements, and to the at least two memory devices for controlling the operation thereof.