公开(公告)号：EP1156528B1

公开(公告)日：2006-08-30

申请号：EP00830337.2

申请日：2000-05-08

Applicant: STMicroelectronics S.r.l.

Inventor： Lo Verde, Domenico ,  Bruno, Giuseppe

IPC: H01L23/58

CPC classification number: H01L23/585 ,  H01L24/05 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2224/45099

公开(公告)号：EP1156528A1

公开(公告)日：2001-11-21

申请号：EP00830337.2

申请日：2000-05-08

Applicant: STMicroelectronics S.r.l.

Inventor： Lo Verde, Domenico ,  Bruno, Giuseppe

IPC: H01L23/58

CPC classification number: H01L23/585 ,  H01L24/05 ,  H01L24/48 ,  H01L2224/04042 ,  H01L2224/05 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/45015 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48465 ,  H01L2224/85399 ,  H01L2224/8592 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00 ,  H01L2924/20752 ,  H01L2224/45099

Abstract: On a semiconductor material body (15) housing an electronic device (3) a peripheral region (22) of semiconductor material and at least one pad (20, 21) are initially formed. The peripheral region (22) is connected to a first terminal of the electronic device (3) and extends on at least one peripheral portion of the semiconductor material body (15). The pad (20, 21) is insulated from the semiconductor material body and is electrically connected to a second terminal of the electronic device (3). The semiconductor material body (15) is fixed to a support body (10) formed by a blank (5) belonging to a reel (1). The pad (20, 21) is connected by a wire (24) to an electrode (11, 12) formed by the blank (5). Next, a connection region (25a) is formed on the peripheral region (22) and surrounds, at least partially, the semiconductor material body (15) and the support body (10). The connection region (25a) is advantageously obtained by galvanic growth.

Abstract translation: 首先，在容纳电子器件（3）的半导体材料体（15）上，形成半导体材料的外围区域（22）和至少一个焊盘（20,21）。 外围区域（22）连接到电子设备（3）的第一端子并且在半导体材料体（15）的至少一个周边部分上延伸。 焊盘（20,21）与半导体材料体绝缘并且电连接到电子器件（3）的第二端子。 半导体材料体（15）固定在由属于卷轴（1）的坯件（5）形成的支撑体（10）上。 焊盘（20,21）通过导线（24）连接到由坯料（5）形成的电极（11,12）。 接下来，在周边区域（22）上形成连接区域（25a），至少部分地包围半导体材料体（15）和支撑体（10）。 连接区域（25a）有利地通过电生长获得。

公开(公告)号：EP1061572A1

公开(公告)日：2000-12-20

申请号：EP99830372.1

申请日：1999-06-16

Applicant: STMicroelectronics S.r.l.

Inventor： Lo Verde, Domenico ,  Santangelo, Antonello

IPC: H01L21/74 ,  H01L27/082 ,  H01L21/8222

CPC classification number: H01L29/66287 ,  H01L21/8222 ,  H01L27/0823

Abstract: Integrated structure (100) for radio frequency applications, formed in a chip of semiconductor material, comprising a substrate (103) having a first type of conductivity (P) on which at least one epitaxial layer (109, 118) is grown, at least one connecting region (106) having the first type of conductivity (P) extending from a free surface of the at least one epitaxial layer (109, 118) to the substrate (103), to form an insulating region which demarcates a portion of the at least one epitaxial layer (109, 118) in which a bipolar transistor (Tp) is formed, the transistor (Tp) comprising a collector region (115, 118, 127) having a second type of conductivity (N) delimited by the free surface and by the connecting region (106), a base region having the first type of conductivity (P) extending from the free surface into the collector region (115, 118, 127), and an emitter region having the second type of conductivity (N) extending from the free surface into the base region, in which are included conducting means (148, 157e) in contact on the free surface with one of the base region and the emitter region, and with the connecting region (106), to electrically connect the said one region to the substrate (103).

Abstract translation: 形成在半导体材料芯片中的用于射频应用的集成结构（100）包括至少一个外延层（109,118）生长至少具有第一类型导电性（P）的衬底（103） 具有从所述至少一个外延层（109,118）的自由表面延伸到所述基板（103）的第一类型的导电性（P）的一个连接区域（106），以形成绝缘区域 至少一个其中形成双极晶体管（Tp）的外延层（109,118），所述晶体管（Tp）包括具有第二导电类型（N）的集电极区域（115,118,127），所述第二导电类型（N）由所述自由 表面，并且通过连接区域（106），具有从自由表面延伸到集电区域（115,118,127）中的第一类型导电性（P）的基极区域和具有第二类型导电性的发射极区域 N）从自由表面延伸到基部区域中 在所述自由表面上与所述基极区域和所述发射极区域之一接触的导电装置（148,157e）以及所述连接区域（106）将所述一个区域电连接到所述基板（103）。