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    Use of an error correction circuit in program and erase verify procedures
    3.
    发明公开
    Use of an error correction circuit in program and erase verify procedures 有权
    Benutzung einer Fehlerkorrektionsschaltung在Programmierungs-undLöschverifikation

    公开(公告)号：EP1355234A1

    公开(公告)日：2003-10-22

    申请号：EP02425231.4

    申请日：2002-04-15

    Applicant: STMicroelectronics S.r.l.

    Inventor： Micheloni, Rino ,  Losavio, Aldo

    IPC: G06F11/10 ,  G11C16/34

    CPC classification number: G06F11/1068

    Abstract: The method for using a nonvolatile memory (1) having a plurality of cells (14), each of which stores a datum, is based upon the steps of performing an modification operation of erasing/programming (22) the data of the memory; verifying (23) the correctness of the data of the memory cells; and, if the step of verifying (23) has revealed at least one incorrect datum, correcting on-th-field (46) the incorrect datum, using an error correcting code. The verification (23) of the correctness of the data is performed by determining (23) the number of memory cells storing an incorrect datum; if the number of memory cells storing the incorrect datum is less than or equal to a threshold (46), the erroneous datum is corrected by the error correction code; otherwise, new erasing/programming pulses are supplied.

    Abstract translation: 使用具有存储数据的多个单元（14）的非易失性存储器（1）的方法基于执行擦除/编程（22）存储器的数据的修改操作的步骤; 验证（23）存储器单元的数据的正确性; 并且如果验证（23）的步骤已经显示至少一个不正确的数据，则使用错误校正码校正不正确的数据（46）。 通过确定（23）存储不正确数据的存储单元的数量来执行数据正确性的验证（23） 如果存储不正确的数据的存储单元的数量小于或等于阈值（46），则错误校正码校正错误的数据; 否则，将提供新的擦除/编程脉冲。

    Self-repair method for non volatile memory device with erasing/programming failure detection, and non volatile memory device therefor
    5.
    发明公开
    Self-repair method for non volatile memory device with erasing/programming failure detection, and non volatile memory device therefor 有权
    用于与擦除/编程错误检测非易失性存储器件和非易失性存储器设备，用于自修复方法

    公开(公告)号：EP1365419A1

    公开(公告)日：2003-11-26

    申请号：EP02425319.7

    申请日：2002-05-21

    Applicant: STMicroelectronics S.r.l.

    Inventor： Micheloni, Rino ,  Losavio, Aldo

    IPC: G11C29/00

    CPC classification number: G11C29/82 ,  G11C29/846

    Abstract: The memory device (20) has a memory block (1), formed by a plurality of standard sectors (15) and a redundancy portion (2); a control circuit (3), which controls programming and erasing of the data of the memory cells; and a correctness verifying circuit (7) for the data stored in the memory cells. The correctness verifying circuit (7) is enabled by the control circuit (3) and generates an incorrect-datum signal in the event of detection of at least one non-functioning cell. The control circuit moreover activates redundancy, enabling the redundancy portion (2) and storing redundancy data in a redundancy-memory stage (5b) in the presence of an incorrect datum. Various solutions are presented that implement column, row and sector redundancy, both in case of erasing and programming.

    Abstract translation: 所述存储器装置（20）具有存储块（1）中，通过标准的扇区（15）的形成有多个和冗余部（2）; 其控制所述存储器单元的数据的编程和擦除控制电路（3）; 和用于所述数据的正确性验证电路（7）存储在存储器单元中。 正确性验证电路（7）由所述控制电路（3）和基因速率不正确的，基准信号在检测到至少一个非功能性细胞的的情况下启用。 该控制电路更在激活冗余，使冗余部分（2）和在一个不正确的日期的存在下，在冗余存储器阶段（5b）中存储的冗余数据。 各种解决方案都没有实现列，行和部门冗余，无论是在擦除和编程的情况。

    Self-repair method for nonvolatile memory devices using a supersecure architecture, and nonvolatile memory device
    6.
    发明公开
    Self-repair method for nonvolatile memory devices using a supersecure architecture, and nonvolatile memory device 有权
    与架构非易失性存储器，用于避免错误和非易失性存储器的自修复方法

    公开(公告)号：EP1357559A1

    公开(公告)日：2003-10-29

    申请号：EP02425265.2

    申请日：2002-04-26

    Applicant: STMicroelectronics S.r.l.

    Inventor： Micheloni, Rino ,  Losavio, Aldo

    IPC: G11C29/00

    CPC classification number: G11C29/808

    Abstract: The self-repair method for a nonvolatile memory (1) intervenes at the end of an operation of modification, selected between programming and erasing, in the event of detection of just one non-functioning cell (14a, 14c), and carries out redundancy of the non-functioning cell. To this end, the memory array (15) is divided into a basic portion (20), formed by a plurality of memory cells (14a) storing basic data, and into a on-the-field redundancy portion (21), said on-the-field redundancy portion (21) being designed to store redundancy data including a correct content of the non-functioning cell, the address of the non-functioning cell, and an activated redundancy flag. The redundancy is activated only after applying a preset maximum number of modification pulses and uses a purposely designed redundancy replacement circuit (12) and a purposely designed redundancy data verification circuit (7b).

    Abstract translation: 用于非易失性存储器（1）的自修复方法介入在操作修改的结束时，编程和擦除之间选择，在检测只有一个无功能的细胞（14A，14C）的的情况下，进行冗余 的非功能性细胞。 为此，存储器阵列（15）被划分成基本部分（20），由存储器单元的存储基本数据的多个（14a）的形成，并且为上的场冗余部分（21），所述上 -the场冗余部分（21）被设计来存储数据冗余包括无功能的细胞的正确的内容，无功能单元的地址，以及在活化的冗余标志。 冗余只施加变形脉冲的预置最大数之后被激活，并使用一个专门设计冗余置换电路（12）和一个专门设计的冗余数据的验证电路（7B）。

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