公开(公告)号：EP1840902B1

公开(公告)日：2009-08-05

申请号：EP06425214.1

申请日：2006-03-29

Applicant: STMicroelectronics S.r.l.

Inventor： Mondello, Antonino

IPC: G11C16/22

CPC classification number: G11C16/22 ,  G11C8/20 ,  G11C16/04 ,  G11C29/52 ,  G11C2029/0407

公开(公告)号：EP1775731B1

公开(公告)日：2009-12-02

申请号：EP05425718.3

申请日：2005-10-13

Applicant: STMicroelectronics S.r.l.

Inventor： Malhi, Vijay Kumar ,  Mondello, Antonino

IPC: G11C16/10

CPC classification number: G11C16/102 ,  G11C16/105 ,  H03K21/403

公开(公告)号：EP1873787B1

公开(公告)日：2010-02-17

申请号：EP06425452.7

申请日：2006-06-30

Applicant: STMicroelectronics S.r.l.

Inventor： Mondello, Antonino ,  Pisasale, Michelangelo

IPC: G11C29/12

CPC classification number: G11C29/02 ,  G11C16/04 ,  G11C29/021 ,  G11C29/028

公开(公告)号：EP1775731A1

公开(公告)日：2007-04-18

申请号：EP05425718.3

申请日：2005-10-13

Applicant: STMicroelectronics S.r.l.

Inventor： Malhi, Vijay Kumar ,  Mondello, Antonino

IPC: G11C16/10

CPC classification number: G11C16/102 ,  G11C16/105 ,  H03K21/403

Abstract: The present invention describes a non-volatile memory device comprising a matrix of non-volatile memory cells (1), a writing circuitry (2) and a reading circuitry (3) for said memory cells of the matrix. The device comprises a counter comprising a sector (11) of non-volatile memory cells and logic means (5) capable of scanning the memory cells of said sector (11) by means of said reading circuitry and of updating said sector (11) by commanding the writing of a given value in a memory cell different from the memory cell containing said given value by means of said writing circuitry (2).

Abstract translation: 本发明描述了一种非易失性存储器件，其包括用于矩阵的所述存储器单元的非易失性存储器单元（1），写入电路（2）和读取电路（3）的矩阵。 该装置包括一个计数器，该计数器包括非易失性存储器单元的扇区（11）和能够通过所述读取电路扫描所述扇区（11）的存储单元的逻辑装置（5），并且通过 通过所述写入电路（2）命令在与包含所述给定值的存储单元不同的存储单元中写入给定值。

公开(公告)号：EP1881505A1

公开(公告)日：2008-01-23

申请号：EP06425503.7

申请日：2006-07-20

Applicant: STMicroelectronics S.r.l.

Inventor： Mondello, Antonino ,  Tumminia, Alessandro ,  Buono, Luigi

IPC: G11C29/16 ,  G11C29/00

CPC classification number: G11C29/48 ,  G11C16/04 ,  G11C29/16 ,  G11C29/4401 ,  G11C29/82

Abstract: An automatic redundancy system exploits and existent microprocessor management system on chip for carrying out autonomously, without communicating with the external test machine, the operations of writing data in the memory array according to one or more pre-established test patterns, of verifying data successively read from the memory array, eventually of substituting failed elements of the array with equivalent redundancy structures. A logic structure detects and stores eventual array fails upstream of the output data path, thus speeding up data collection relating to eventual fails without any interaction with the EWS test machine apart from communicating the end of the execution of the redundancy process.

Abstract translation: 一种自动冗余系统攻击和在芯片上用于自主执行现有微处理器管理系统，不与外部测试机，写入数据的操作的存储器阵列中的雅丁连通到一个或多个预先确定的测试图案，核实数据的顺序读出 从存储器阵列，最终与代等效冗余结构阵列的不合格元件。 逻辑结构检测并存储最终的阵列的输出数据路径的上游发生故障，从而加快数据采集与最终失败，而不与EWS测试机除了通信的冗余处理的执行结束的任何相互作用。

公开(公告)号：EP1873787A1

公开(公告)日：2008-01-02

申请号：EP06425452.7

申请日：2006-06-30

Applicant: STMicroelectronics S.r.l.

Inventor： Mondello, Antonino , 

IPC: G11C29/12

CPC classification number: G11C29/02 ,  G11C16/04 ,  G11C29/021 ,  G11C29/028

Abstract: The invention relates to a method and a relative automatic regulation device of the reference sources in a non volatile memory device, for example a flash memory. The method is characterised by the following steps::
- providing, in the memory device (2), a regulation device (1) of the reference sources (5, 6, 7) and at least one start command (START) for the entry in regulation mode;
- providing, on the device (2), at least one command for the selection of a corresponding reference source to be regulated;
- applying an external reference signal (V REF , I REF );
- starting the automatic regulation step by means of said command (START);
- detecting the result of the regulation step by means of a logic output (FAIL) of the memory device (2);
- if the result of the regulation of a given source is positive, proceeding, by means of the same process steps, with the regulation of another source.

Abstract translation: 本发明涉及一种方法和的参考源中的非易失性存储器装置的相对自动调节装置中，例如闪速存储器。 该方法由以下步骤::化 - 提供，在所述存储器装置（2），调节装置（1）的基准源（5，6，7）和至少一个用于输入开始命令（START） 在调节模式; - 提供，该装置（2）上，用于相应的参考源的选择至少一个命令要被调节; - 施加到外部参考信号（V REF，I REF）; - 通过开始所述命令的手段（START）自动调节步骤; - 由一个逻辑输出的存储装置的（FAIL）（2）来检测的调节步骤的结果; - 如果给定的源的调节的结果是肯定的，则前进，通过相同的处理步骤的装置，与另一个源的调节。

公开(公告)号：EP1840902A1

公开(公告)日：2007-10-03

申请号：EP06425214.1

申请日：2006-03-29

Applicant: STMicroelectronics S.r.l.

Inventor： Mondello, Antonino

IPC: G11C16/22

CPC classification number: G11C16/22 ,  G11C8/20 ,  G11C16/04 ,  G11C29/52 ,  G11C2029/0407

Abstract: A method of protecting/unprotecting addressable sectors of a non volatile memory device including also an ancillary volatile memory array, for preventing illicit modification of non volatily stored data in the addressable sectors, comprising the steps of storing protection information on the addressable sectors of the non volatile memory device in a dedicated non volatile memory space inaccessible to users of the device and of obliging a check of the permanently stored protection information whenever data stored in a certain memory sector must be modified, further comprises the steps of:
reading the permanently stored protection information from the inaccessible non volatile memory space at every power-on of the device and copying it in the ancillary volatile memory array including at least two additional check columns containing preset logic information;
prior to modifying data stored in an addressable memory sector, reading the protection information of the sector from the volatile memory array and the content of the check columns;
if the read content of the check columns matches the preset logic information, the read sector protection information is assumed true and the modification of data in the selected sector is allowed;
if the read content of the check columns does not match the preset logic information, the event is signalled, data modification circuitry of the device is disabled and the permanently stored protection information is downloaded again from the inaccessible non volatile memory space in the volatile memory array for reestablishing therein the correct original protection information.

Abstract translation: 保护/不受保护的非易失性存储器装置，其包括这样的辅助性存储器阵列上的可寻址的扇区，为了防止在寻址的扇区非volatily存储的数据的非法修改，包括存储保护信息在非的可寻址的扇区中的步骤的方法 在专用的非易失性存储器空间难以接近设备和迫使的每当存储在某个存储器的扇区数据必须被改性的永久存储保护信息的支票的用户的易失性存储器装置，还包括如下步骤：读取所述永久存储保护 从在每一个不可访问的非易失性存储器空间上电设备和所述辅助性存储器阵列包含含有预设逻辑信息的至少两个额外的检查列中复制它的信息; 之前修改在可寻址存储器扇区存储在数据，读取来自易失性存储器阵列和所述校验列的内容的扇区的保护信息; 如果检查列的读取的内容预先设定的逻辑信息相匹配，读出扇区保护信息被假定真和在所选择的扇区数据的修改是允许; 如果检查的列的读出的内容不匹配预设逻辑信息，该事件被发信号通知，该装置的数据修改电路被禁用，并且永久地存储保护信息的易失性存储器阵列中从不可访问的非易失性存储器空间重新下载 用于重建在其中正确的原始保护信息。