Abstract:
Described herein is an asynchronous serial dichotomic sense amplifier (10) comprising a first comparator stage (12) having a first input receiving the cell current (I CELL ) flowing in the multilevel memory cell (18), the content of which is to be read, a second input receiving a first reference current (I REF2 ), and an output supplying the first of the bits stored in the multilevel memory cell (18); a multiplexer stage (16) having a selection input (16c) connected to the output of the first comparator stage (12), a first signal input (16a) receiving a second reference current (I REF1 ), a second signal input (16b) receiving a third reference current (I REF3 ), and a signal output (16d) selectively connectable to the first or the second signal input (16a, 16b) depending on the logic level present on the selection input (16c); and a second comparator stage (14) having a first input receiving the cell current (I CELL ), a second input connected to the signal output (16d) of the multiplexer stage (16), and an output supplying the second of the bits stored in the multilevel memory cell (18).