Reading circuit and method for a multilevel non volatile memory
    2.
    发明公开
    Reading circuit and method for a multilevel non volatile memory 有权
    Leseschaltkreis undzugehörigesVerfahrenfürnichtflüchtigenMehrpegel-Speicher

    公开(公告)号:EP1249841A1

    公开(公告)日:2002-10-16

    申请号:EP01830248.9

    申请日:2001-04-10

    CPC classification number: G11C11/5642 G11C11/56 G11C11/5621 G11C2211/5632

    Abstract: Described herein is an asynchronous serial dichotomic sense amplifier (10) comprising a first comparator stage (12) having a first input receiving the cell current (I CELL ) flowing in the multilevel memory cell (18), the content of which is to be read, a second input receiving a first reference current (I REF2 ), and an output supplying the first of the bits stored in the multilevel memory cell (18); a multiplexer stage (16) having a selection input (16c) connected to the output of the first comparator stage (12), a first signal input (16a) receiving a second reference current (I REF1 ), a second signal input (16b) receiving a third reference current (I REF3 ), and a signal output (16d) selectively connectable to the first or the second signal input (16a, 16b) depending on the logic level present on the selection input (16c); and a second comparator stage (14) having a first input receiving the cell current (I CELL ), a second input connected to the signal output (16d) of the multiplexer stage (16), and an output supplying the second of the bits stored in the multilevel memory cell (18).

    Abstract translation: 读取电路包括异步串行二色读取器(12,14,16)。 读取器包括比较器(12)。 比较器的输出提供存储在多电平存储单元(18)中的一个位。 选择器(16)具有连接到比较器的输出和两个信号输入的选择输入。 选择器具有可选择性地连接到两个信号输入之一的输出,这取决于选择输入上的逻辑电平。 电路还包括第二比较器(14)。 还包括以下独立权利要求:(a)多层存储单元的读取方法。

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