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1.发明授权Method and device for suppressing parasitic effects in a junction-insulated integrated circuit 失效装置和方法，用于抑制在集成电路中具有的pn绝缘区的寄生效应
公开(公告)号：EP0847089B1
公开(公告)日：2002-10-23
申请号：EP96830614.2
申请日：1996-12-09
Applicant: STMicroelectronics S.r.l.
Inventor： Ravanelli, Enrico Maria , Pozzoni, Massimo , Pedrazzini, Giorgio , Ricotti, Giulio
IPC: H01L27/088 , H01L27/02
CPC classification number: H01L27/0248 , H01L27/088
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