公开(公告)号：EP4040507A1

公开(公告)日：2022-08-10

申请号：EP22152484.6

申请日：2022-01-20

Applicant: STMicroelectronics S.r.l.

Inventor： RASCUNA', Simone ,  BELLOCCHI, Gabriele ,  SANTORO, Marco

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/16 ,  H01L21/329

Abstract: Junction Barrier Schottky device (50) comprising: a semiconductor body (68) of SiC with a first conductivity; an implanted region (59') with a second conductivity, extending into the semiconductor body (68) at a top surface (52a) of the semiconductor body (68), to form a junction barrier, JB, diode (59) with the semiconductor body (68); and an electrical terminal (58) in ohmic contact with the implanted region (59') and in direct electrical contact with the top surface (52a), laterally to the implanted region (59'), to form a Schottky diode (62) with the semiconductor body (68). The implanted region (59') is formed by a first (63') and a second portion (63") electrically connected directly to each other and aligned along an alignment axis (55) transverse to the top surface (52a). Orthogonally to the alignment axis (55), the first portion (63') has a first maximum width (d 1 ) and the second portion (63") has a second maximum width (d 2 ) greater than the first maximum width (d 1 ).