Abstract:
The memory cell (1) is formed in a body (3) of a P-type semiconductor material forming a channel region (25) and housing N-type drain and source regions (15, 12) at two opposite sides of the channel region (25). A floating gate region (5) extends above the channel region (25). A P-type charge injection region (18) extends in the body (3) contiguously to the drain region (15), at least in part between the channel region (25) and the drain region (15). An N-type base region (21) extends between the drain region (15), the charge injection region (18), and the channel region (25). The charge injection region (18) and the drain region (15) are biased by special contact regions (19, 16) so as to forward bias the PN junction formed by the charge injection region (18) and the base region (21). The holes thus generated in the charge injection region (18) are directly injected through the base region (21) into the body (3), where they generate, by impact, electrons that are injected towards the floating gate region (5).