公开(公告)号：EP1113492B9

公开(公告)日：2010-02-03

申请号：EP99830826.6

申请日：1999-12-31

Applicant: STMicroelectronics S.r.l.

Inventor： D'Arrigo, Giuseppe ,  Spinella, Corrado ,  Coffa, Salvatore ,  Arena, Giuseppe ,  Camalleri, Marco

IPC: H01L21/762 ,  H01L21/316

CPC classification number: H01L21/3063 ,  C25F3/12 ,  H01L21/31662 ,  H01L21/32105 ,  H01L21/7624 ,  H01L21/76264 ,  H01L21/76286

公开(公告)号：EP1113492B1

公开(公告)日：2009-09-23

申请号：EP99830826.6

申请日：1999-12-31

Applicant: STMicroelectronics S.r.l.

Inventor： D'Arrigo, Giuseppe ,  Spinella, Corrado ,  Coffa, Salvatore ,  Arena, Giuseppe ,  Camalleri, Marco

IPC: H01L21/762 ,  H01L21/316

CPC classification number: H01L21/3063 ,  C25F3/12 ,  H01L21/31662 ,  H01L21/32105 ,  H01L21/7624 ,  H01L21/76264 ,  H01L21/76286

公开(公告)号：EP1113492A1

公开(公告)日：2001-07-04

申请号：EP99830826.6

申请日：1999-12-31

Applicant: STMicroelectronics S.r.l. ,  CNR-IMETEM

Inventor： D'Arrigo, Giuseppe ,  Spinella, Corrado ,  Coffa, Salvatore ,  Arena, Giuseppe ,  Camalleri, Marco

IPC: H01L21/762 ,  H01L21/316

CPC classification number: H01L21/3063 ,  C25F3/12 ,  H01L21/31662 ,  H01L21/32105 ,  H01L21/7624 ,  H01L21/76264 ,  H01L21/76286

Abstract: This invention relates to a method of fabricating a SOI (Silicon-On-Insulator) wafer suitable to manufacture electronic semiconductor devices and including a substrate of monocrystalline silicon with a top surface, and a doped buried region in the substrate. The method comprises at least one step of forming trench-like openings extended from the substrate surface down to the buried region, and comprises:

a selective etching step carried out through said openings to change said buried region of monocrystalline silicon into porous silicon;
a subsequent step of oxidising the buried region that has been changed into porous silicon, to obtain an insulating portion of said SOI wafer.

Abstract translation: 本发明涉及一种制造适合于制造电子半导体器件并包括具有顶表面的单晶硅衬底以及衬底中的掺杂掩埋区的SOI（绝缘体上硅）晶片的方法。 该方法包括形成从衬底表面向下延伸到掩埋区域的沟槽状开口的至少一个步骤，并且包括：通过所述开口执行的选择性蚀刻步骤，以将所述单晶硅的掩埋区域改变为多孔硅; 氧化已经变成多孔硅的掩埋区域的后续步骤，以获得所述SOI晶片的绝缘部分。