公开(公告)号：EP1863089A1

公开(公告)日：2007-12-05

申请号：EP06425371.9

申请日：2006-05-31

Applicant: STMicroelectronics S.r.l.

Inventor： Maurelli, Alfonso ,  Peschiaroli, Daniela ,  Piazza, Fausto ,  Vigiani, Carlo ,  Zabberoni, Paola

IPC: H01L27/105 ,  H01L27/02 ,  H01L21/8239 ,  H01L21/8247

CPC classification number: H01L27/11526 ,  H01L27/0207 ,  H01L27/105 ,  H01L27/1052 ,  H01L27/11519 ,  H01L27/11534

Abstract: A method is described for manufacturing electrically non active structures of an integrated electronic circuit (1) formed on a semiconductor substrate (7) comprising first electrically active structures (2) which comprise electric components provided with conductive elements (16) of a first height (H1) projecting from said semiconductor substrate (7) and second electrically active structures (3) which comprise electric components provided with conductive elements (20) of a second height (H2) projecting from said semiconductor substrate (7), said first height being different from said second height, the method comprising the steps of:
- introducing, into the integrated electronic circuit (1), electrically non active structures (4) to superficially uniform the integrated electronic circuit (1),
- identifying, between the electrically non active structures (4), a first group (5) of electrically non active structures which is formed by those electrically non active structures comprised in areas (5a) which substantially extend for a predetermined radius (R) around each electric component belonging to the second electrically active structures (3),
- identifying, between the electrically non active structures (4), a second group (6) of electrically non active structures comprising electrically non active structures not belonging to the first group (5) of electrically non active structures,
- forming the electrically non active structures belonging to the first group (5) of electrically non active structures with elements (20a) projecting from the substrate (7) having a height equal to the second height (H2),
- forming the electrically non active structures belonging to the second group (6) of electrically non active structures with elements (16a) projecting from the substrate (7) having a height equal to the first height (H1), the elements (16a, 20a) belonging to the first (5) and second group (6) of electrically non active structures being formed by means of respective photolithographic steps.

Abstract translation: 描述了一种用于制造形成在半导体衬底（7）上的集成电子电路（1）的非电活动结构的方法，所述电子电路包括第一电活性结构（2），所述第一电活性结构（2）包括设置有第一高度的导电元件（16） H1）和第二电活动结构（3），所述第二电活性结构（3）包括设置有从所述半导体衬底（7）突出的第二高度（H2）的导电元件（20）的电气部件，所述第一高度不同 从所述第二高度，所述方法包括以下步骤：将集成电子电路（1）引入电非活动结构（4）以使所述集成电子电路（1）表面均匀; - 识别所述电非活动 结构（4），由非电活性结构组成的第一组（5），由非电活性结构构成 围绕属于第二电活动结构（3）的每个电气部件围绕预定半径（R）延伸的区域（5a）， - 识别在电非活性结构（4）之间的电子非活性结构（4）的第二组（6） 非活性结构包括不属于电非活性结构的第一组（5）的非电活性结构， - 形成属于电非活性结构的第一组（5）的非电活性结构，其中元件（20a）从 所述衬底（7）具有等于所述第二高度（H2）的高度， - 形成属于所述第二组（6）的电非活性结构的电非活性结构，其中从所述衬底（7）突出的元件（16a） 属于第一高度（H1）的高度，属于非活性结构的第一组（5）和第二组（6）的元件（16a，20a）通过相应的ph形成 光刻步骤。