公开(公告)号：EP1605400A1

公开(公告)日：2005-12-14

申请号：EP04425433.2

申请日：2004-06-11

Applicant: STMicroelectronics S.r.l.

Inventor： Spampinato, Giuseppe ,  Pappalardo, Francesco ,  Fodera, Paolo Antonino ,  Virlinzi, Francesco ,  Capra, Alessandro

IPC: G06T1/60 ,  G06T3/40

CPC classification number: G06T3/4015 ,  G06T1/20

Abstract: A color image pixel data processing pipeline for performing, among corrective and image enhancement steps, at least an interpolation on color data to generate triplets located at distinct pixel locations, including among a plurality of defect correction and image enhancement blocks at least a first color interpolation block, generating RGB information for each pixel of the input image pixel pattern, a second color interpolation block receiving the RGB pattern pixels from said first color interpolation block and rendering enhanced RGB pattern pixels, and a plurality of dedicated line memories and delay circuits associated to and cooperating with said interpolation and correction blocks for permitting real-time processing of pixel data, further includes input image pixel pattern data read/write buffers first and second, of identical capacity suitable to store a subset or pixel block (m*n) of the image data, for translating the scanning mode of pixel data being fed to the input line memory and delay circuits associated to al least said first color interpolation block of said pipeline, from linewise to columnwise, for each subset of data stored in said first and second buffers.
The switching from linewise writing to columnwise reading of the data temporarily stored in input buffer means, reduces overall memory requisite without sensibly increasing computational overhead.