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公开(公告)号：EP1865654A8
公开(公告)日：2008-04-16
申请号：EP07104627.0
申请日：2007-03-21
Applicant: STMicroelectronics S.r.l. , STMicroelectronics, Inc.
Inventor： Bertoni, Guido , Owen, Jefferson E.
CPC classification number: H04L9/0631 , H04L9/0637 , H04L9/3242 , H04L2209/125 , H04L2209/24 , H04L2209/38 , H04L2209/80
Abstract: The invention concerns circuitry for encrypting at least a part of an input data (Bi) flow and generating a tag based on said input data flow with a same ciphering algorithm and a same key comprising: a first ciphering branch arranged to encrypt said at least part of said input data; a second ciphering branch arranged to generate said tag; and a single key schedule unit arranged to receive said key, to generate at least one sub-key based on said key and to provide said at least one sub-key to said first and second ciphering branches.
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公开(公告)号：EP1865655A8
公开(公告)日：2008-04-16
申请号：EP07104629.6
申请日：2007-03-21
Applicant: STMicroelectronics S.r.l. , STMicroelectronics, Inc.
Inventor： Bertoni, Guido , Owen, Jefferson E.
CPC classification number: H04L9/0631 , H04L9/0637 , H04L9/3242 , H04L2209/125 , H04L2209/24 , H04L2209/38 , H04L2209/80
Abstract: The invention concerns Circuitry for encrypting at least a part of an input data (Bi) flow and generating a tag based on said input data flow with a same ciphering algorithm and a same key (K), said algorithm comprising iterative computations by at least two operation units, said circuitry comprising a pipeline comprising: an input selection unit (612) arranged to receive first data values to generate encryption sequences with said ciphering algorithm, second data values to generate temporary tags with said ciphering algorithm and an output of the pipeline; a first stage (627) arranged to receive an output of said input selection unit and comprising at least a first operation unit (632); and a second stage (635) arranged to receive an output of the first stage, comprising at least a second operation unit (648) and providing said output of the pipeline.
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公开(公告)号：EP1865654A1
公开(公告)日：2007-12-12
申请号：EP07104627.0
申请日：2007-03-21
Applicant: STMicroelectronics S.r.l.
Inventor： Bertoni, Guido , Owen, Jefferson E.
CPC classification number: H04L9/0631 , H04L9/0637 , H04L9/3242 , H04L2209/125 , H04L2209/24 , H04L2209/38 , H04L2209/80
Abstract: The invention concerns circuitry for encrypting at least a part of an input data (Bi) flow and generating a tag based on said input data flow with a same ciphering algorithm and a same key comprising: a first ciphering branch arranged to encrypt said at least part of said input data; a second ciphering branch arranged to generate said tag; and a single key schedule unit arranged to receive said key, to generate at least one sub-key based on said key and to provide said at least one sub-key to said first and second ciphering branches.
Abstract translation: 本发明涉及用于加密输入数据（Bi）流的至少一部分并基于所述输入数据流以相同的加密算法和相同的密钥生成标签的电路，包括：第一加密分支，被布置为加密所述至少部分 的所述输入数据; 布置成生成所述标签的第二加密分支; 以及单个密钥调度单元，被配置为接收所述密钥，以基于所述密钥生成至少一个子密钥，并向所述第一和第二加密分支提供所述至少一个子密钥。
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4.发明公开Implementation of AES encryption circuitry with CCM 审中-公开集成einer AES-Verschlüsselungsschaltungmit CCM
公开(公告)号：EP1865655A1
公开(公告)日：2007-12-12
申请号：EP07104629.6
申请日：2007-03-21
Applicant: STMicroelectronics S.r.l.
Inventor： Bertoni, Guido , Owen, Jefferson E.
CPC classification number: H04L9/0631 , H04L9/0637 , H04L9/3242 , H04L2209/125 , H04L2209/24 , H04L2209/38 , H04L2209/80
Abstract: The invention concerns Circuitry for encrypting at least a part of an input data (Bi) flow and generating a tag based on said input data flow with a same ciphering algorithm and a same key (K), said algorithm comprising iterative computations by at least two operation units, said circuitry comprising a pipeline comprising: an input selection unit (612) arranged to receive first data values to generate encryption sequences with said ciphering algorithm, second data values to generate temporary tags with said ciphering algorithm and an output of the pipeline; a first stage (627) arranged to receive an output of said input selection unit and comprising at least a first operation unit (632); and a second stage (635) arranged to receive an output of the first stage, comprising at least a second operation unit (648) and providing said output of the pipeline.
Abstract translation: 本发明涉及用于加密至少一部分输入数据（Bi）流并基于所述输入数据流以相同的加密算法和相同密钥（K）生成标签的电路，所述算法包括至少两次的迭代计算 所述电路包括：流水线，包括：输入选择单元，被配置为接收第一数据值以产生具有所述加密算法的加密序列;第二数据值，用于利用所述加密算法生成临时标签和输出管道; 布置成接收所述输入选择单元的输出并且至少包括第一操作单元（632）的第一级（627）; 以及布置成接收第一级的输出的第二级（635），包括至少第二操作单元（648）并提供管道的所述输出。
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Patent Agency Ranking5.发明公开Picture memory mapping to minimize memory bandwidth in compression and decompression of image sequences 审中-公开图像存储器映射在图像序列的压缩和解压缩存储器带宽减小
公开(公告)号：EP0917374A3
公开(公告)日：2002-01-30
申请号：EP98309301.4
申请日：1998-11-13
Applicant: STMicroelectronics, Inc.
Inventor： Balakrishnan, Jeyendran , Owen, Jefferson E.
IPC: H04N7/50
CPC classification number: G06F12/0207 , H04N19/102 , H04N19/16 , H04N19/172 , H04N19/423 , H04N19/433 , H04N19/61
Abstract: A method of storing a picture in a memory such that bandwidth can be reduced when retrieving an array portion of the picture from the memory, and a memory architecture are disclosed. The memory is subdivided into a plurality of words for storing a picture having rows and columns. The picture is partitioned into two or more stripes each having a predetermined number of columns. The number of bytes in one row of one stripe is equal to the number of bytes in one word, for storing the data in one row of a stripe in one word.
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6.发明公开Picture memory mapping to minimize memory bandwidth in compression and decompression of image sequences 审中-公开Bildspeenzherabbildung zur Speicherbandbreitenminimierung in Bildsequenzkompression und -dekompression
公开(公告)号：EP0917374A2
公开(公告)日：1999-05-19
申请号：EP98309301.4
申请日：1998-11-13
Applicant: STMicroelectronics, Inc.
Inventor： Balakrishnan, Jeyendran , Owen, Jefferson E.
IPC: H04N7/50
CPC classification number: G06F12/0207 , H04N19/102 , H04N19/16 , H04N19/172 , H04N19/423 , H04N19/433 , H04N19/61
Abstract: A method of storing a picture in a memory such that bandwidth can be reduced when retrieving an array portion of the picture from the memory, and a memory architecture are disclosed. The memory is subdivided into a plurality of words for storing a picture having rows and columns. The picture is partitioned into two or more stripes each having a predetermined number of columns. The number of bytes in one row of one stripe is equal to the number of bytes in one word, for storing the data in one row of a stripe in one word.
Abstract translation: 一种将图像存储在存储器中的方法，使得可以在从存储器检索图像的阵列部分时减少带宽，并且公开了存储器架构。 存储器被细分为用于存储具有行和列的图片的多个单词。 将图像分割成两条或多条，每条具有预定数量的列。 一个条带的一行中的字节数等于一个字中的字节数，用于以一个字存储数据的一行。
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7.发明授权Synchronizing an audio-visual stream which is synchronized to a clock with the timebase of a video display device which is synchronized to a different clock 失效同步与该时间基地同步的视频显示装置的时钟的视听数据流同步以不同的时钟的信号
公开(公告)号：EP0847191B1
公开(公告)日：2009-07-29
申请号：EP97309610.0
申请日：1997-11-28
Applicant: STMicroelectronics, Inc.
Inventor： Baron, Yehuda , Owen, Jefferson E. , McDade, Darryn D.
IPC: H04N5/44
CPC classification number: H04N9/8042 , G11B20/00007 , G11B20/10527 , G11B27/10 , G11B27/3027 , G11B2220/2562 , H04N5/85 , H04N21/4143 , H04N21/42646 , H04N21/4305 , H04N21/4307
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8.发明公开Picture memory mapping to minimize memory bandwidth in compression and decompression of image sequences 审中-公开图像存储器映射可最大限度地减少图像序列压缩和解压缩中的内存带宽
公开(公告)号：EP1689195A2
公开(公告)日：2006-08-09
申请号：EP06075840.6
申请日：1998-11-13
Applicant: STMicroelectronics, Inc.
Inventor： Balakrishnan, Jeyendran , Owen, Jefferson E.
IPC: H04N7/50
CPC classification number: G06F12/0207 , H04N19/102 , H04N19/16 , H04N19/172 , H04N19/423 , H04N19/433 , H04N19/61
Abstract: A method of storing a picture in a memory such that bandwidth can be reduced when retrieving an array portion of the picture from the memory, and a memory architecture are disclosed. The memory is subdivided into a plurality of words for storing a picture having rows and columns. The picture is partitioned into two or more stripes each having a predetermined number of columns. The number of bytes in one row of one stripe is equal to the number of bytes in one word, for storing the data in one row of a stripe in one word.
Abstract translation: 一种将图片存储在存储器中的方法，以便当从存储器检索图片的阵列部分时可以减少带宽，并且公开了一种存储器架构。 存储器被细分成多个词用于存储具有行和列的图片。 该图片被分成两个或更多个条，每个条具有预定数量的列。 一个条带的一行中的字节数等于一个字中的字节数，用于将数据存储在一个字中的条带的一行中。
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9.发明公开Picture memory mapping to minimize memory bandwidth in compression and decompression of image sequences 审中-公开图像存储器映射在图像序列的压缩和解压缩存储器带宽减小
公开(公告)号：EP1689195A3
公开(公告)日：2006-09-27
申请号：EP06075840.6
申请日：1998-11-13
Applicant: STMicroelectronics, Inc.
Inventor： Balakrishnan, Jeyendran , Owen, Jefferson E.
CPC classification number: G06F12/0207 , H04N19/102 , H04N19/16 , H04N19/172 , H04N19/423 , H04N19/433 , H04N19/61
Abstract: A method of storing a picture in a memory such that bandwidth can be reduced when retrieving an array portion of the picture from the memory, and a memory architecture are disclosed. The memory is subdivided into a plurality of words for storing a picture having rows and columns. The picture is partitioned into two or more stripes each having a predetermined number of columns. The number of bytes in one row of one stripe is equal to the number of bytes in one word, for storing the data in one row of a stripe in one word.
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