公开(公告)号：EP1292976A1

公开(公告)日：2003-03-19

申请号：EP01947572.2

申请日：2001-06-21

Applicant: STMicroelectronics SA

Inventor： LE GOASCOZ, Vincent ,  JAOUEN, Hervé

IPC: H01L21/762 ,  H01L21/265

CPC classification number: H01L21/26533 ,  H01L21/76243

Abstract: The invention concerns a method comprising: 1)a first phase including steps which consist in forming in the upper part of a first initial semiconductor substrate a first layer of insulating material above a sectional plane of said first substrate, contacting the first layer of insulating material with the insulating upper part of a second initial substrate, so as to form a single layer of insulating material, a break at the sectional plane, so as to obtain an intermediate semiconductor substrate on the single insulating material layer; then, 2) in a second phase which consists in forming in the intermediate semiconductor substrate an additional insulating material layer adjacent to the single insulating material and topped with an upper layer of a final semiconductor substrate.