中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

20 records (took 0.031 seconds)

    Device and method for calibrating phased array antenna
    3.
    发明授权
    Device and method for calibrating phased array antenna 有权

    公开(公告)号：US11251882B2

    公开(公告)日：2022-02-15

    申请号：US16641207

    申请日：2017-12-15

    Applicant: Samsung Electronics Co., Ltd

    Inventor： Manh-Tuan Dao ,  Yonghoon Kim ,  Yuichi Aoki

    IPC: H04B17/12 ,  H04B17/10 ,  H04B7/06

    Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates beyond 4th-Generation (4G) communication system such as long-term evolution (LTE). The present disclosure provides a device and a method for calibrating a phased array antenna. A method for calibrating a phased array antenna according to various embodiments of the disclosure comprises the processes of: controlling a first radio frequency (RF) chain so as to transmit a first signal at a first phase, thereby determining the phase difference between the first phase and a reference phase; controlling the first RF chain so as to transmit a second signal at a second phase, thereby determining the phase condition of the phase difference; and calibrating the first RF chain on the basis of the phase difference and the phase condition. The reference phase may be the phase of a reference signal transmitted from a reference RF chain. Accordingly, the time necessary for calibration may be reduced, and mass production of phased array antennas may be facilitated. The present research has been financed by the Korean government (Ministry of Science and ICT) in 2017 and conducted with the support of “Intra-ministry Giga Korean Project” (No. GK17N0100, Millimeter-wave 5G Mobile Communication System Development).

    Electronic device including transceiver for calibrating I/Q imbalance in millimeter wave communication system and method of operating same
    4.
    发明授权
    Electronic device including transceiver for calibrating I/Q imbalance in millimeter wave communication system and method of operating same 有权

    公开(公告)号：US11050495B2

    公开(公告)日：2021-06-29

    申请号：US16933190

    申请日：2020-07-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Tuan Manh Dao ,  Yuichi Aoki ,  Yonghoon Kim

    IPC: H04B17/14 ,  H04B17/21

    Abstract: The disclosure relates to a communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT). A method of operating an electronic device in a wireless communication system is provided. The method includes inputting training signals into a first loopback route and a second loopback route, determining a loopback gain and a loopback phase, based on a first training signal passing through the first loopback route and a second training signal passing through the second loopback route, determining a frequency domain compensation filter, based on the loopback gain and the loopback phase, determining an FIR filter and a DC offset, based on the frequency domain compensation filter, and compensating for a transmission signal and a reception signal, based on the FIR filter and the DC offset.

    Semiconductor package including multiple semiconductor chips
    9.
    发明授权
    Semiconductor package including multiple semiconductor chips 有权

    公开(公告)号：US11205631B2

    公开(公告)日：2021-12-21

    申请号：US16822300

    申请日：2020-03-18

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Yonghoon Kim ,  Jaehyun Lim ,  Yuntae Lee ,  Sayoon Kang

    IPC: H01L23/00 ,  H01L23/31 ,  H01L23/48 ,  H01L25/065

    Abstract: Provided is a semiconductor package including a package structure including a base connection member including a redistribution layer, a first semiconductor chip including a plurality of first connection pads connected to the redistribution layer, an encapsulant disposed on the base connection member and covering at least a portion of the first semiconductor chip, and a backside connection member disposed on the encapsulant and including a backside wiring layer electrically connected to the redistribution layer, and a second semiconductor chip disposed on the base connection member or the backside connection member, the second semiconductor chip including a plurality of second connection pads connected to the redistribution layer or the backside wiring layer, the second semiconductor chip including a logic circuit, the first semiconductor chip including a logic input and output terminals that are connected to the logic circuit through at least one of the redistribution layer and the backside wiring layer.

    Semiconductor package
    10.
    发明授权
    Semiconductor package 有权

    公开(公告)号：US10756076B2

    公开(公告)日：2020-08-25

    申请号：US16201361

    申请日：2018-11-27

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yonghoon Kim

    IPC: H01L25/18 ,  H01L25/065 ,  H01L23/00 ,  H01L23/50 ,  H01L25/11 ,  H01L25/07

    Abstract: A semiconductor package includes a package substrate, a logic chip on the package substrate, a memory stack structure on the package substrate and including first and second semiconductor chips stacked along a first direction, and a first bump between the package substrate and the memory stack structure. The logic chip and the memory stack are spaced apart along a second direction, crossing the first direction, on the package substrate. The first semiconductor chip includes a through via electrically connected to the second semiconductor chip, a chip signal pad connected to the through via, and a first redistribution layer electrically connected to the chip signal pad and having an edge signal pad in contact with the first bump. A distance between the logic chip and the edge signal pad along the second direction is less than that between the logic chip and the chip signal pad.

Patent Agency Ranking