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公开(公告)号:US12217958B2
公开(公告)日:2025-02-04
申请号:US16807702
申请日:2020-03-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Keunwook Shin , Janghee Lee , Seunggeol Nam , Hyeonjin Shin , Hyunseok Lim , Alum Jung , Kyung-Eun Byun , Jeonil Lee , Yeonchoo Cho
Abstract: A method of pre-treating a substrate on which graphene will be directly formed may include pre-treating the substrate using a pre-treatment gas including at least a carbon source and hydrogen.
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公开(公告)号:US12062697B2
公开(公告)日:2024-08-13
申请号:US18055565
申请日:2022-11-15
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun Lee , Minsu Seol , Yeonchoo Cho , Hyeonjin Shin
IPC: H01L29/10 , H01L21/02 , H01L29/40 , H01L29/417 , H01L29/423 , H01L29/66 , H01L29/78
CPC classification number: H01L29/1037 , H01L21/02568 , H01L29/408 , H01L29/41791 , H01L29/42364 , H01L29/66795 , H01L29/785
Abstract: Provided is a semiconductor device which use a two-dimensional semiconductor material as a channel layer. The semiconductor device includes: a gate electrode on a substrate; a gate dielectric on the gate electrode; a channel layer on the gate dielectric; and a source electrode and a drain electrode that may be electrically connected to the channel layer. The gate dielectric has a shape with a height greater than a width, and the channel layer includes a two-dimensional semiconductor material.
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公开(公告)号:US10850985B2
公开(公告)日:2020-12-01
申请号:US16233513
申请日:2018-12-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Alum Jung , Keunwook Shin , Kyung-Eun Byun , Hyeonjin Shin , Hyunseok Lim , Seunggeol Nam , Hyunjae Song , Yeonchoo Cho
IPC: H01L29/12 , C01B32/186 , C23C16/26 , C23C16/505 , C23C16/511 , H01L21/02 , H01L29/16 , H01L29/06 , H01L29/04
Abstract: A method of forming nanocrystalline graphene by a plasma-enhanced chemical vapor deposition process is provided. The method of forming nanocrystalline graphene includes arranging a protective layer on a substrate and growing nanocrystalline graphene directly on the protective layer by using a plasma of a reaction gas. The reaction gas may include a mixed gas of a carbon source gas, an inert gas, and hydrogen gas.
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4.
公开(公告)号:US10217513B2
公开(公告)日:2019-02-26
申请号:US15448998
申请日:2017-03-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun Lee , Seunggeol Nam , Changhyun Kim , Hyeonjin Shin , Yeonchoo Cho , Jinseong Heo , Seongjun Park
Abstract: A phase change memory device may include a phase change layer that includes a two-dimensional (2D) material. The phase change layer may include a layered structure that includes one or more layers of 2D material. The phase change layer may be provided between a first electrode and a second electrode, and the phase of at least a portion of one or more of the layers of 2D material may be changed based on an electrical signal applied to the phase change layer through the first electrode and the second electrode. The 2D material may include a chalcogenide-based material or phosphorene. The 2D material may be associated with a phase change temperature that is greater than or equal to about 200° C. and lower than or equal to about 500° C.
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公开(公告)号:US10199469B2
公开(公告)日:2019-02-05
申请号:US15439031
申请日:2017-02-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Seunggeol Nam , Hyeonjin Shin , Yeonchoo Cho , Minhyun Lee , Changhyun Kim , Seongjun Park
IPC: H01L29/66 , H01L29/40 , H01L29/78 , H01L21/283 , H01L29/417 , H01L29/45 , H01L29/786
Abstract: A semiconductor device includes a silicon semiconductor layer including at least one region doped with a first conductive type dopant, a metal material layer electrically connected to the doped region, and a self-assembled monolayer (SAM) between the doped region and the metal material layer, the SAM forming a molecular dipole on an interface of the silicon semiconductor layer in a direction of reducing a Schottky barrier height (SBH).
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公开(公告)号:US12046656B2
公开(公告)日:2024-07-23
申请号:US17405619
申请日:2021-08-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yeonchoo Cho , Kyung-Eun Byun , Hyeonjin Shin
IPC: H01L29/45
CPC classification number: H01L29/45 , H01L29/452 , H01L29/456
Abstract: Disclosed is a semiconductor device including a surface-treated semiconductor layer. The semiconductor device includes a metal layer, a semiconductor layer electrically contacting the metal layer and having a surface treated with an element having an electron affinity of about 4 eV or greater, and a two-dimensional (2D) material layer disposed between the metal layer and the semiconductor layer and having a 2D crystal structure.
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公开(公告)号:US12027588B2
公开(公告)日:2024-07-02
申请号:US18056446
申请日:2022-11-17
Applicant: Samsung Electronics Co., Ltd.
Inventor: Minhyun Lee , Minsu Seol , Yeonchoo Cho , Hyeonjin Shin
IPC: H01L29/10 , H01L29/24 , H01L29/423
CPC classification number: H01L29/1033 , H01L29/24 , H01L29/42356 , H01L29/42364
Abstract: A field effect transistor includes a substrate, a source electrode and a drain electrode on the substrate and apart from each other in a first direction, a plurality of channel layers, a gate insulating film surrounding each of the plurality of channel layers, and a gate electrode surrounding the gate insulating film. Each of the plurality of channel layers has ends contacting the source electrode and the drain electrode. The plurality of channel layers are spaced apart from each other in a second direction away from the substrate. The plurality of channel layers include a 2D semiconductor material.
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公开(公告)号:US11906291B2
公开(公告)日:2024-02-20
申请号:US17145966
申请日:2021-01-11
Applicant: Samsung Electronics Co., Ltd.
Inventor: Eunkyu Lee , Yeonchoo Cho , Sangwon Kim , Kyung-Eun Byun , Hyunjae Song , Hyeonjin Shin
IPC: G01B15/02 , G01N23/2208 , H01L21/285 , H01L21/66 , H01L29/45 , G01N23/2273
CPC classification number: G01B15/02 , G01N23/2208 , G01N23/2273 , H01L21/28512 , H01L22/12 , H01L29/45 , G01N2223/085 , G01N2223/61
Abstract: A method of calculating a thickness of a graphene layer and a method of measuring a content of silicon carbide, by using X-ray photoelectron spectroscopy (XPS), are provided. The method of calculating the thickness of the graphene layer, which is directly grown on a silicon substrate, includes measuring the thickness of the graphene layer directly grown on the silicon substrate, by using a ratio between a signal intensity of a photoelectron beam emitted from the graphene layer and a signal intensity of a photoelectron beam emitted from the silicon substrate.
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公开(公告)号:US11881399B2
公开(公告)日:2024-01-23
申请号:US17949418
申请日:2022-09-21
Inventor: Kyung-Eun Byun , Hyoungsub Kim , Taejin Park , Hoijoon Kim , Hyeonjin Shin , Wonsik Ahn , Mirine Leem , Yeonchoo Cho
IPC: H01L21/02
CPC classification number: H01L21/02568 , H01L21/0262 , H01L21/02491 , H01L21/02658
Abstract: A method of forming a transition metal dichalcogenide thin film on a substrate includes treating the substrate with a metal organic material and providing a transition metal precursor and a chalcogen precursor around the substrate to synthesize transition metal dichalcogenide on the substrate. The transition metal precursor may include a transition metal element and the chalcogen precursor may include a chalcogen element.
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公开(公告)号:US11217531B2
公开(公告)日:2022-01-04
申请号:US16884590
申请日:2020-05-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Kyung-Eun Byun , Keunwook Shin , Yonghoon Kim , Hyeonjin Shin , Hyunjae Song , Changseok Lee , Changhyun Kim , Yeonchoo Cho
IPC: H01L23/532
Abstract: Provided are an interconnect structure and an electronic device including the interconnect structure. The interconnect structure includes a dielectric layer including at least one trench, a conductive wiring filling an inside of the at least one trench, and a cap layer on at least one surface of the conductive wiring. The cap layer includes nanocrystalline graphene. The nanocrystalline includes nano-sized crystals.
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