-
公开(公告)号:US20230299238A1
公开(公告)日:2023-09-21
申请号:US18122513
申请日:2023-03-16
Applicant: Sensor Electronic Technology, Inc.
Inventor: Rakesh B. Jain , Mohamed Lachab , Joseph Dion , Brandon Alexander Robinson , Devendra Diwan , Mark Geppert
CPC classification number: H01L33/325 , H01L33/22 , H01L33/12
Abstract: A solution for fabricating a semiconductor structure and the corresponding semiconductor structure are provided. The semiconductor structure includes a plurality of semiconductor layers grown over a substrate using a set of epitaxial growth periods. During each epitaxial growth period, a first semiconductor layer having one of: a tensile stress or a compressive stress is grown followed by growth of a second semiconductor layer having the other of: the tensile stress or the compressive stress directly on the first semiconductor layer.
-
公开(公告)号:US20240421245A1
公开(公告)日:2024-12-19
申请号:US18821093
申请日:2024-08-30
Applicant: Sensor Electronic Technology, Inc.
Inventor: Joseph Dion , Devendra Diwan , Brandon Alexander Robinson , Rakesh B. Jain
Abstract: An optoelectronic device with reduced optical losses is disclosed. The optoelectronic device includes a set of n-type layers; an active region that includes at least one quantum well configured to generate radiation at a peak emitted wavelength and at least one barrier; and a set of p-type layers disposed on the active region. A reflective layer can be disposed on the set of p-type layers. The set of p-type layers can included an electron blocking region, and a thickness of the electron blocking region can be 80% or less than a thicking of the set of p-type layers. Additionally, a thickness of the at least one barrier can be 20% or less than the thickness of the set of p-type layers.
-